BD9740KN-E2 Rohm Semiconductor, BD9740KN-E2 Datasheet - Page 12

• Manufacturer Part Number: BD9740KN-E2
• Description: IC SWITCH REG W/FET 48UQFN
• Manufacturer: Rohm Semiconductor
• Series: -r
• Type: Step-Down (Buck), Step-Up (Boost), Inverting, PWMr

Specifications of BD9740KN-E2

• Internal Switch(s): Yes
• Synchronous Rectifier: Yes
• Number Of Outputs: 7
• Voltage - Output: -
• Current - Output: 30mA
• Frequency - Switching: 100kHz ~ 1.2MHz
• Voltage - Input: 1.5 V ~ 10 V
• Operating Temperature: -20°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-VFQFN
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

●Notes for use
BD9739KN,BD9740KN
© 2010 ROHM Co., Ltd. All rights reserved.
www.rohm.com
10) Capacitors connected between output and ground pins
11) Testing on application boards
12) Regarding input pin of the IC (Fig 11)
1) Absolute maximum ratings
2) Reverse polarity connection of the power supply
3) Power supply lines
4) GND voltage
5) Thermal design
6) Inter-pin shorts and mounting errors
7) Operation in a strong electromagnetic field
8) ASO
9) Thermal shutdown circuit (TSD circuit)
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can
break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any
over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as
fuses.
Connecting the of power supply in reverse polarity can damage IC. Take precautions when connecting the power supply
lines. An external direction diode can be added.
Design PCB layout pattern to provide low impedance GND and supply lines. To obtain a low noise ground and supply line,
separate the ground section and supply lines of the digital and analog blocks. Furthermore, for all power supply terminals
to ICs, connect a capacitor between the power supply and the GND terminal. When applying electrolytic capacitors in the
circuit, note that capacitance characteristic values are reduced at low temperatures.
Ground-GND potential should maintain at the minimum ground voltage level. Furthermore, no terminals should be lower
than the GND potential voltage including an electric transients.
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any
connection error or if positive and ground power supply terminals are reversed. The IC may also be damaged if pins are
shorted together or are shorted to other circuit’s power lines.
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to
malfunction.
When using the IC, set the output transistor so that it does not exceed absolute maximum ratings or ASO.
The IC incorporates a built-in thermal shutdown circuit (TSD circuit). The thermal shutdown circuit (TSD circuit) is
designed only to shut the IC off to prevent runaway thermal operation. It is not designed to protect the IC or guarantee its
operation. Do not continue to use the IC after operating this circuit or use the IC in an environment where the operation of
this circuit is assumed.
If a large capacitance value is connected between the output and ground pins, and if the VCC falls to 0 V or becomes
shorted with the ground pin, the current stored in the capacitor may flow to the output pin. This can cause damage to the
IC. Set capacitors connected between the output and ground pins to values that fall within the recommended range.
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress.
Always discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to, or
removing it from a jig or fixture, during the inspection process. Ground the IC during assembly steps as an antistatic
measure. Use similar precaution when transporting and storing the IC.
This monolithic IC contains P
junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode or
transistor. For example, the relation between each potential is as follows:
When GND > Pin A and GND > Pin B, the P–N junction operates as a parasitic diode.
When Pin B > GND > Pin A, the P–N junction operates as a parasitic transistor.
Parasitic diodes can occur inevitably in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Accordingly, methods by which parasitic diodes
operate, such as applying a voltage that is lower than the GND (P substrate) voltage to an input pin, should not be used.
+
isolation and P substrate layers between adjacent elements to keep them isolated. P–N
12/14
Technical Note
2010.09 - Rev.A