BD9740KN-E2 Rohm Semiconductor, BD9740KN-E2 Datasheet - Page 4

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BD9740KN-E2

Manufacturer Part Number
BD9740KN-E2
Description
IC SWITCH REG W/FET 48UQFN
Manufacturer
Rohm Semiconductor
Series
-r
Type
Step-Down (Buck), Step-Up (Boost), Inverting, PWMr
Datasheet

Specifications of BD9740KN-E2

Internal Switch(s)
Yes
Synchronous Rectifier
Yes
Number Of Outputs
7
Voltage - Output
-
Current - Output
30mA
Frequency - Switching
100kHz ~ 1.2MHz
Voltage - Input
1.5 V ~ 10 V
Operating Temperature
-20°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
●PVCCH and PVCCL input voltages
BD9739KN,BD9740KN
© 2010 ROHM Co., Ltd. All rights reserved.
www.rohm.com
(Unless otherwise specified, Ta = 25℃, VBAT = 3 V, VCC = 5 V, RT = 11 kΩ, CT = 180 pF, STB1 to STB7 = 3 V)
[Power on switching block] (BD9739KN)
SWOUT1
SWOUT4
SWOUT4,6
SWOUT7
[Soft start block] (BD9740KN)
Soft start time of CH4
Soft start time of CH2, 3
CH2, CH3 soft start
INV4 threshold voltage at start
[STB1 to STB7]
STB pin control voltage
STB pin pull-down resistance
[Circuit current]
Standby current 1
(VBAT pin sink current)
Standby current 2
(VCC, PVCC pin sink current)
Circuit current at startup
(VBAT pin sink current)
Circuit current 1
(VBAT pin sink current)
Circuit current 2
(VCC, PVCC pin sink current)
Note: This IC is not designed to be radiation-resistant.
Fig. 1 Synchronous Rectification
Channel with Built-In FET
Parameter
PVCCH
Output voltage
Leak current
Output voltage
Leak current
Output voltage
Leak current
Output voltage
Leak current
PVCCL
DRAINH
DRAINL
PGND
ON
OFF
Vo
Symbol
V
V
R
V
I
V
I
V
I
V
I
V
I
I
T
T
I
I
LEAK
LEAK
LEAK
LEAK
STB1
STB2
STBH
I
STBL
CC1
CC2
PG4
SAT
SAT
SAT
SAT
SS1
SS2
STB
ST
 Synchronous rectification channels with built-in FETs include, N-channel FETs
Note:
 The breakdown voltage for the PVCCL and PVCCH pins is 15 V.
 Shorting the DRAINH pin with the ground, while a charge remains in the output
for both the high-side and low-side configuration. The driver block's power
source is supplied to the PVCCL pin for the low-side and the PVCCH pin for
the high-side. (For the BD9740KN, both sides are supplied to the PVCCH pin.)
In order to turn the FET on, a potential of at least 4 V must be supplied to the
PVCCL pin, and a potential of at least, DRAINH pin voltage + 4 V, must be
supplied to the PVCCH pin.
For applications that with voltages exceeding 15 V, add a zener diode, or other
components, to provide overvoltage protection.
capacitor, may cause unexpected current flow, resulting in damage to the IC.
Add an external protective diode for applications where this possibility exists.
V
V
SWIN6
SWIN7
0.72
Min.
-0.3
250
1.8
1.8
2.0
- 0.3 V
- 0.3 V
4/14
SWIN7
SWIN6
Limits
Typ.
0.80
400
100
0.1
0.1
3.6
3.6
30
0
0
0
0
5
- 0.1
- 0.1
Max.
0.88
700
100
300
0.3
0.3
6.0
6.0
0.3
15
11
5
5
5
5
5
5
mse
mse
Unit
mA
mA
µA
µA
µA
µA
µA
µA
µA
V
V
V
V
V
V
V
c
c
IO = 1 mA
STB = 0 V
IO = 100 μA
STB = 0 V
IO = 20 mA
VSWIN = 5 V
STB = 0 V
IO = 10 mA
VSWIN = 10 V
STB = 0 V
VCC = PVCC = 5V,
PVCCH = 5.0V
STB 0→3 V
VCC = PVCC = 5V,
STB = 3 V
INV4 = 0→1.2 V
VCC = PVCC = 5 V
PVCCH = 5.0 V
STB
STB
STB1 to STB7 = 0 V
STB1 to STB7 = 0 V
CT = 1.7 V
VCC = 0 V
CT = 1.7 V
CT = 1.7 V
INV = 2.5 V
Conditions
Technical Note
2010.09 - Rev.A

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