ADP5033ACBZ-1-R7 Analog Devices Inc, ADP5033ACBZ-1-R7 Datasheet - Page 16

• Manufacturer Part Number: ADP5033ACBZ-1-R7
• Description: IC REG QD SYNC BUCK/LDO1 16WLCSP
• Manufacturer: Analog Devices Inc
• Series: -r

Specifications of ADP5033ACBZ-1-R7

• Topology: Step-Down (Buck) Synchronous (2), Linear (LDO) (2)
• Function: Any Function
• Number Of Outputs: 4
• Frequency - Switching: 3MHz
• Voltage/current - Output 1: 0.8 V ~ 3.3 V, 800mA
• Voltage/current - Output 2: 0.8 V ~ 3.3 V, 800mA
• Voltage/current - Output 3: 0.8 V ~ 3.3 V, 300mA
• W/led Driver: No
• W/supervisor: No
• W/sequencer: No
• Voltage - Supply: 1.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-WFBGA, WLCSP
• No. Of Outputs: 4
• No. Of Pins: 16
• Operating Temperature Range: -40°C To +125°C
• Supply Voltage: 5.5V
• No. Of Step-down Dc - Dc Converters: 2
• No. Of Ldo Regulators: 2
• Digital Ic Case Style: WLCSP
• No. Of Regulated Outputs: 2
• Rohs Compliant: Yes
• Primary Input Voltage: 5.5V
• Output Voltage: 2.8V
• Output Current: 800mA
• Switching Frequency Max: 3MHz
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: ADP5033ACBZ-1-R7TR

ADP5033
S
driver to turn on and turn off the power devices at the switching
frequency. The amount of switching power loss is given by
whe
C
C
For the ADP5033, the total of (C
mately 150 pF.
The transition l
MOSFET cannot be turned on or off instantaneously, and t
SW node takes some time to slew from near ground to near
V
loss is calculated by
whe
switching node, SW. For the ADP5033, the rise and fall time
SW are in the order of 5 ns.
If the preceding equations an
ing the converter efficiency, it must be noted that the equations
do not describe all of the converter losses, and the parameter
values given are typical numbers. The converter performance
also depends on the choice of passive components and board
layout; therefore, a sufficient safety margin should be included
in the estimate.
LDO Regulator Power
The power loss of a LDO regulator is gi
whe
I
V
respectively.
I
Power dissipation due to the ground current is sm
can be ignored.
LOAD
GND
witching losses are associated with the current drawn by the
GATE-P
GATE-N
OUT1
IN
and V
re:
re t
re:
is the ground current of the LDO regulator.
P
P
P
is t
(and from V
SW
TRAN
DLDO
is
is the N-MOSFET gate capacitance.
RISE
he load current of the LDO regulator.
= (C
the P-MOSFET gate capacitance.
OUT
= V
= [(V
and t
GATE-P
are input and output voltages of th
IN1
osses occur because the P-channel power
FALL
IN
× I
− V
OUT1
+ C
are the rise time and the
OU
T1
OUT
GATE-N
to ground). The amount of transition
× (t
) × I
Dissipation
) × V
RISE
d parameters are used for estimat-
LOAD
+ t
GATE-P
IN1
] + (V
FALL
2
× f
) × f
+ C
SW
IN
ven by
× I
SW
GAT
GND
E-N
fall time of the
) is approxi-
)
e LDO,
all, and it
he
(10)
(11)
s of
(12)
Rev. 0 | Page 16 of 28
JUNCTION TEMPERATURE
The total power dissipation in the ADP5033 simplifies to
In cases where the board temperature T
resistance parameter, θ
temperature rise. T
formula
The typical θ
57°C/W (see Table 6). A very important factor to consider is
that θ
JEDEC standard, and real applications may use different sizes
and layers. It is important to maximize the copper used to remove
the heat from the device. Copper exposed to air dissipates heat
better than copper used in the inner layers. The exposed pad
should be connected to the ground plane with several vias.
If the case temperature can be measured, the junction tempera-
ture is calculated by
where T
board thermal resistance provided in Table 6.
When designing an application for a particular ambient
temperature range, calculate the expected ADP5033 power
dissipation (P
Equation 8 to Equation 13. From this power calculation, the
junction temperature, T
The reliable operation of the converter and the two LDO regulators
can be achieved only if the estimated die junction temperature of
the ADP5033 (Equation 14) is less than 125°C. Reliability and
mean time between failures (MTBF) is highly affected by increas-
ing the junction temperature. Additional information about
product reliability can be found in the ADI Reliability Handbook,
which can be found at www.analog.com/reliability_handbook.
P
T
T
JA
D
J
J
= T
= T
= P
is based on a 4-layer 4 in × 3 in, 2.5 oz copper, as per
C
is the case temperature and Ψ
A
C
DBUCK
+ (P
+ (P
JA
D
) due to the losses of all channels by using the
value for the 16-ball, 0.5 mm pitch WLCSP is
+ P
D
D
× Ψ
× θ
J
DLDO1
is calculated from T
JA
JB
JA
)
)
J
, can be used to estimate the junction
, can be estimated using Equation 14.
+ P
DLDO2
JB
A
A
is known, the thermal
is the junction-to-
and P
D
using the
(13)
(14)
(15)