ADP5033ACBZ-1-R7 Analog Devices Inc, ADP5033ACBZ-1-R7 Datasheet - Page 22

• Manufacturer Part Number: ADP5033ACBZ-1-R7
• Description: IC REG QD SYNC BUCK/LDO1 16WLCSP
• Manufacturer: Analog Devices Inc
• Series: -r

Specifications of ADP5033ACBZ-1-R7

• Topology: Step-Down (Buck) Synchronous (2), Linear (LDO) (2)
• Function: Any Function
• Number Of Outputs: 4
• Frequency - Switching: 3MHz
• Voltage/current - Output 1: 0.8 V ~ 3.3 V, 800mA
• Voltage/current - Output 2: 0.8 V ~ 3.3 V, 800mA
• Voltage/current - Output 3: 0.8 V ~ 3.3 V, 300mA
• W/led Driver: No
• W/supervisor: No
• W/sequencer: No
• Voltage - Supply: 1.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-WFBGA, WLCSP
• No. Of Outputs: 4
• No. Of Pins: 16
• Operating Temperature Range: -40°C To +125°C
• Supply Voltage: 5.5V
• No. Of Step-down Dc - Dc Converters: 2
• No. Of Ldo Regulators: 2
• Digital Ic Case Style: WLCSP
• No. Of Regulated Outputs: 2
• Rohs Compliant: Yes
• Primary Input Voltage: 5.5V
• Output Voltage: 2.8V
• Output Current: 800mA
• Switching Frequency Max: 3MHz
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: ADP5033ACBZ-1-R7TR

ADP5033
Input Capacitor
Higher value input capacitors help to reduce the input voltage
ripple and improve transient response. Maximum input
capacitor current is calculated using the following equation:
To minimize supply noise, place the input capacitor as close
to the VINx pin of the buck as possible. As with the output
capacitor, a low ESR capacitor is recommended.
The effective capacitance needed for stability, which includes
temperature and dc bias effects, is a minimum of 3 μF and a
maximum of 10 μF. A list of suggested capacitors is shown in
Table 10.
Table 10. Suggested 4.7 μF Capacitors
Vendor
Murata
Taiyo Yuden
Panasonic
LDO CAPACITOR SELECTION
Output Capacitor
The ADP5033 LDOs are designed for operation with small,
space-saving ceramic capacitors, but function with most
commonly used capacitors as long as care is taken with the ESR
value. The ESR of the output capacitor affects the stability of the
LDO control loop. A minimum of 0.70 μF capacitance with an
ESR of 1 Ω or less is recommended to ensure the stability of the
ADP5033. Transient response to changes in load current is also
affected by output capacitance. Using a larger value of output
capacitance improves the transient response of the ADP5033 to
large changes in load current.
Input Bypass Capacitor
Connecting a 1 μF capacitor from VIN3 and VIN4 to ground
reduces the circuit sensitivity to printed circuit board (PCB)
layout, especially when long input traces or a high source
impedance is encountered. If greater than 1 μF of output
capacitance is required, increase the input capacitor to match it.
Table 11. Suggested 1.0 μF Capacitors
Vendor
Murata
TDK
Panasonic
Taiyo Yuden
Input and Output Capacitor Properties
Use any good quality ceramic capacitors with the ADP5033 as
long as they meet the minimum capacitance and maximum ESR
requirements. Ceramic capacitors are manufactured with a
I
CIN
≥
I
LOAD
Type
X5R
X5R
X5R
Type
X5R
X5R
X5R
X5R
(
MAX
)
Model
GRM188R60J475ME19D
JMK107BJ475
ECJ-0EB0J475M
V
Model
GRM155B30J105K
C1005JB0J105KT
ECJ0EB0J105K
LMK105BJ105MV-F
OUT
(
V
V
IN
IN
−
V
OUT
)
Case
Size
0402
0402
0402
0402
Case
Size
0402
0402
0402
Voltage
Rating (V)
6.3
6.3
6.3
10.0
Voltage
Rating
(V)
6.3
6.3
6.3
Rev. 0 | Page 22 of 28
variety of dielectrics, each with a different behavior over
temperature and applied voltage. Capacitors must have a
dielectric adequate to ensure the minimum capacitance over the
necessary temperature range and dc bias conditions. X5R or
X7R dielectrics with a voltage rating of 6.3 V or 10 V are
recommended for best performance. Y5V and Z5U dielectrics
are not recommended for use with any LDO because of their
poor temperature and dc bias characteristics.
Figure 46 depicts the capacitance vs. voltage bias characteristic
of a 0402 1 μF, 10 V, X5R capacitor. The voltage stability of a
capacitor is strongly influenced by the capacitor size and voltage
rating. In general, a capacitor in a larger package or higher voltage
rating exhibits better stability. The temperature variation of the
X5R dielectric is about ±15% over the −40°C to +85°C tempera-
ture range and is not a function of package or voltage rating.
Use the following equation to determine the worst-case capa-
citance accounting for capacitor variation over temperature,
component tolerance, and voltage:
where:
C
TEMPCO is the worst-case capacitor temperature coefficient.
TOL is the worst-case component tolerance.
In this example, the worst-case temperature coefficient
(TEMPCO) over −40°C to +85°C is assumed to be 15% for an
X5R dielectric. The tolerance of the capacitor (TOL) is assumed
to be 10%, and C
Substituting these values into the following equation,
Therefore, the capacitor chosen in this example meets the
minimum capacitance requirement of the LDO over
temperature and tolerance at the chosen output voltage.
To guarantee the performance of the ADP5033, it is imperative
that the effects of dc bias, temperature, and tolerances on the
behavior of the capacitors be evaluated for each application.
BIAS
C
C
is the effective capacitance at the operating voltage.
EFF
EFF
1.2
1.0
0.8
0.6
0.4
0.2
0
0
= C
= 0.94 μF × (1 − 0.15) × (1 − 0.1) = 0.719 μF
Figure 46. Capacitance vs. Voltage Characteristic
BIAS
× (1 − TEMPCO) × (1 − TOL)
1
BIAS
is 0.94 μF at 1.8 V, as shown in Figure 46.
DC BIAS VOLTAGE (V)
2
3
4
5
6