PDI1394P25BD ST-Ericsson Inc, PDI1394P25BD Datasheet - Page 26

• Manufacturer Part Number: PDI1394P25BD
• Description: IC IEEE 1394 LINK CTRLR 64LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of PDI1394P25BD

• Applications: AV,TV, VTR
• Interface: IEEE 1394
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 64-LQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Philips Semiconductors
introduced into the PHY’s Phase Lock Loop, and minimizing any
emissions from the circuit. The crystal and two load capacitors
should be considered as a unit during layout. The crystal and load
capacitors should be placed as close as possible to one another
while minimizing the loop area created by the combination of the
three components. Varying the size of the capacitors may help in
this. Minimizing the loop area minimizes the effect of the resonant
current (Is) that flows in this resonant circuit. This layout unit (crystal
and load capacitors) should then be placed as close as possible to
the PHY XI and XO terminals to minimize trace lengths.
2001 Sep 06
1-port 400 Mbps physical layer interface
Figure 12. Recommended Crystal and Capacitor Layout
C9
X1
C10
SV01809
25
It is strongly recommended that part of the verification process for
the design be to measure the frequency of the SYSCLK output of
the PHY. This should be done with a frequency counter with an
accuracy of 6 digits or better. If the SYSCLK frequency is more than
the crystal’s tolerance from 49.152 MHz, the load capacitance of the
crystal may be varied to improve frequency accuracy. If the
frequency is too high add more load capacitance; if the frequency is
too low decrease load capacitance. Typically, changes should be
done to both load capacitors (C9 and C10 above) at the same time,
and both should be of the same value. Additional design details and
requirements may be provided by the crystal vendor.
PDI1394P25
Preliminary data