MT49H16M36BM-33:A Micron Technology Inc, MT49H16M36BM-33:A Datasheet - Page 17

• Manufacturer Part Number: MT49H16M36BM-33:A
• Manufacturer: Micron Technology Inc
• Type: RLDRAMr

Specifications of MT49H16M36BM-33:A

• Organization: 16Mx36
• Address Bus: 23b
• Operating Supply Voltage (typ): 1.8V
• Package Type: uBGA
• Operating Temp Range: 0C to 95C
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Pin Count: 144
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

Table 5:
Table 6:
PDF: 09005aef80fe62fb/Source: 09005aef809f284b
576Mb_RLDRAM_II_CIO_D2.fm - Rev. I 12/10 EN
Operating burst
read current
example
Standby current
Active standby
current
Operational
current
Operational
current
Operational
current
Burst refresh
current
Distributed
refresh current
Operating burst
write current
example
Operating burst
write current
example
Operating burst
write current
example
Operating burst
read current
example
Description
Description
I
I
DD
DD
Operating Conditions and Maximum Limits – Rev. A
Operating Conditions and Maximum Limits – Rev. B
BL = 8; Cyclic bank access; Half of address bits
change every four clock cycles; Continuous
data; Measurement is taken during continuous
READ
t
CS# = 1; No commands; Bank address
incremented and half address/data change
once every four clock cycles
BL = 2; Sequential bank access; Bank transitions
once every
every
Continuous data during WRITE commands
BL = 4; Sequential bank access; Bank transitions
once every
every
Continuous data during WRITE commands
BL = 8; Sequential bank access; Bank transitions
once every
every
Continuous data during WRITE commands
Eight bank cyclic refresh; Continuous address/
data; Command bus remains in refresh for all
eight banks
Single bank refresh; Sequential bank access;
Half address transitions once every
Continuous data
BL = 2; Cyclic bank access; Half of address bits
change every clock cycle; Continuous data;
Measurement is taken during continuous
WRITE
BL = 4; Cyclic bank access; Half of address bits
change every two clock cycles; Continuous
data; Measurement is taken during continuous
WRITE
BL = 8; Cyclic bank access; Half of address bits
change every four clock cycles; Continuous
data; Measurement is taken during continuous
WRITE
BL = 2; Cyclic bank access; Half of address bits
change every clock cycle; Continuous data;
Measurement is taken during continuous READ
CK = idle; All banks idle; No inputs toggling
t
t
t
RC; Read followed by write sequence;
RC; Read followed by write sequence;
RC; Read followed by write sequence;
t
t
t
RC; Half address transitions once
RC; Half address transitions once
RC; Half address transitions once
576Mb: x9, x18, x36 2.5V V
Condition
Condition
t
RC;
17
I
I
I
I
I
I
I
DD8R
DD2R
I
I
REF1
REF2
DD1
DD2
DD3
I
I
I
I
SB1
SB2
I
I
I
DD2W
DD4W
DD8W
DD8R
I
I
I
DD2R
Micron Technology, Inc., reserves the right to change products or specifications without notice.
I
I
REF1
REF2
DD1
DD2
DD3
SB1
SB2
I
I
I
I
I
I
I
I
DD2W
DD4W
DD8W
I
I
I
I
I
DD8R
DD2W
DD4W
DD8W
DD2R
I
I
REF1
REF2
DD1
DD2
DD3
SB1
SB2
Symbol
Symbol
(V
(V
(V
(V
(V
(V
(V
EXT
(V
X
(V
x9/x18
x9/x18
(V
(V
(V
(V
(V
(V
(V
9/
DD
DD
(V
(V
DD
DD
DD
(V
(V
(V
DD
DD
DD
DD
(V
(V
(V
(V
(V
DD
DD
(V
(V
X
(V
DD
DD
DD
(V
DD
DD
DD
(V
(V
(V
DD
) x9/x18
) x9/x18
(V
(V
(V
, 1.8V V
DD
DD
DD
) x9/x18
) x9/x18
) x9/x18
18
) x9/x18
) x9/x18
EXT
EXT
) x9/x18
) x9/x18
EXT
EXT
EXT
EXT
EXT
) x36
) x36
EXT
EXT
) x36
) x36
) x36
EXT
EXT
EXT
) x36
) x36
DD
DD
DD
) x36
) x36
) x36
) x36
) x36
)
)
)
)
)
)
)
Electrical Specifications – I
)
)
)
)
)
)
)
)
DD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
655
855
-18
-18
30
, HSTL, CIO, RLDRAM II
©2004 Micron Technology, Inc. All rights reserved.
-25E
-25E
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
575
665
30
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
570
-25
660
-25
30
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
450
-33
505
-33
25
Units
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
DD