A2F200M3F-FGG484 Actel, A2F200M3F-FGG484 Datasheet - Page 165
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A2F200M3F-FGG484
Manufacturer Part Number
A2F200M3F-FGG484
Description
ACLA2F200M3F-FGG484 SMART FUSION MIX SIG
Manufacturer
Actel
Datasheet
1.A2F500M3B-1CSH484.pdf
(170 pages)
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Revision
Revision 2
(continued)
Revision 1
(March 2010)
Revision 0
(March 2010)
The number of PLLs for A2F200 was changed from 2 to 1 in the
Product Table"
Values for direct analog input, total analog input, and total I/Os were updated for the
FG256 package, A2F060, in the
column was removed from the table (SAR 26005).
The Speed Grade section of the
(SAR 25257).
The
free packaging and application (junction temperature range).
Table 2-3 • Recommended Operating Conditions
temperature) was replaced with T
PDC5 was deleted from
Power Consumption in SmartFusion
The formulas in the footnotes for
Resistances
The values for input biased current were revised in
Performance
The
bit mode from 600 Ksps to 550 Ksps.
The A2F060 device was added to product information tables.
The
speed grade 1. Pre-production was removed from the application ordering code
category.
The
The
Diagram"
The "VCCI" parameter was renamed to "VCCxxxxIOBx."
"Advanced I/Os" were renamed to "FPGA I/Os."
Generic pin names that represent multiple pins were standardized with a lower case x
as a placeholder. For example, VAREFx designates VAREF0, VAREF1, and VAREF2.
Modes were renamed as follows:
Operating mode was renamed to SoC mode.
32KHz Active mode was renamed to Standby mode.
Battery mode was renamed to Time Keeping mode.
Table entries have been filled with values as data has become available.
Table 2-1 • Absolute Maximum
Table 2-3 • Recommended Operating Conditions
Device names were updated in
Table 2-8 • Quiescent Supply Current Characteristics
Table 2-10 • Summary of I/O Input Buffer Power (per pin) – Default I/O Software
Settings
Removed "Example of Power Calculation."
"Product Ordering Codes"
"Analog Front-End (AFE)" section
"SmartFusion Block Diagram"
"Datasheet Categories" section
"Product Ordering Codes"
was revised extensively.
table, which is new.
were revised.
Specification.
(SAR 25093).
Table 2-14 • Different Components Contributing to the Static
table was revised to add "blank" as an option for lead-
Table 2-6 • Package Thermal
table was updated to removed STD speed and add
Ratings,
"Package I/Os: MSS + FPGA I/Os"
J
was revised.
(junction temperature).
was updated, referencing the
Devices.
R e v i s i o n 3
"Product Ordering Codes"
Changes
was updated to change the throughput for 10-
Table 2-28 • I/O Weak Pull-Up/Pull-Down
Table 2-2 • Analog Maximum
were revised extensively.
Actel SmartFusion Intelligent Mixed Signal FPGAs
was revised extensively.
Table 2-90 • Current Monitor
was revised. Ta (ambient
Resistance.
"SmartFusion Family
"SmartFusion Block
table was revised
table. The Max.
Ratings, and
through
1-4,
Page
2-15
2-29
2-79
2-10
2-12
N/A
N/A
N/A
2-3
2-1
2-3
2-7
VI
VI
VI
IV
III
II
I
IV
6 -3
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