A2F200M3F-FGG484 Actel, A2F200M3F-FGG484 Datasheet - Page 166
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A2F200M3F-FGG484
Manufacturer Part Number
A2F200M3F-FGG484
Description
ACLA2F200M3F-FGG484 SMART FUSION MIX SIG
Manufacturer
Actel
Datasheet
1.A2F500M3B-1CSH484.pdf
(170 pages)
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Revision
Revision 0
(continued)
Draft B
(December 2009)
Table 2-13 • Different Components Contributing to Dynamic Power Consumption in
SmartFusion Devices
Table 2-14 • Different Components Contributing to the Static Power Consumption in
SmartFusion Devices
The
Table 2-80 • Electrical Characteristics of the RC Oscillator
Table 2-82 • Electrical Characteristics of the Low Power Oscillator
extensively.
The parameter t
The 12-bit mode row for integral non-linearity was removed from
Specifications. The typical value for 10-bit mode was revised. The table note was
punctuated correctly to make it clear.
Figure 37-34 • Write Access after Write onto Same Address, Figure 37-34 • Read
Access after Write onto Same Address, and Figure 37-34 • Write Access after Read
onto Same Address
Table 2-96 • Voltage Regulator
The
Circuit (I
"SmartFusion Development Tools" section
The pin description tables were revised by adding additional pins to reflect the pinout
for A2F500.
The descriptions for
The description for
The pin tables for the
that compare pin functions across densities for each package.
The "Digital I/Os" section was renamed to the
and information was added regarding digital and analog VCC.
The
section
The terminology for the analog blocks was changed to "programmable analog,"
consisting of two blocks: the analog front-end and analog compute engine. This is
reflected throughout the text and in the
The
eNVM size.
Timing tables were populated with information that has become available for speed
grade –1.
All occurrences of the VMV parameter were removed.
The SDD[n] voltage parameter was removed from
Ratings.
Table 36-4 • Flash Programming Limits – Retention, Storage and Operating
Temperature
Programming, Storage and Operating
The
"Power Calculation Methodology" section
"Thermal Characteristics" section
"Serial Peripheral Interface (SPI) Characteristics" section
"Product Ordering Codes" table
"SmartFusion Family Product Table"
were revised.
2
C) Characteristics" section
was replaced with
RSTBQ
"VCC33A"
were deleted.
"GNDSDD1"
was revised extensively.
was revised extensively.
"256-Pin FBGA"
was changed to T
was revised.
was revised extensively.
and
are new.
R e vi s i o n 3
"VCC33SDD1"
was revised to add G as an ordering code for
Limits.
Changes
Table 2-4 • FPGA and Embedded Flash
was revised extensively.
and
"SmartFusion Block
C2CWRH
was replaced with new content.
"484-Pin FBGA"
and
was revised.
"I/Os and Operating Voltage" section
"Package I/Os: MSS + FPGA I/Os"
in
Table 2-84 •
were revised.
Table 2-2 • Analog Maximum
was revised extensively.
Diagram".
were replaced with tables
RAM4K9.
and
Table 2-92 • ADC
"Inter-Integrated
was revised
through
5-1,
Page
2-89,
2-13
2-15
2-16
2-63
2-64
2-71
2-81
2-87
2-91
5-14
5-25
N/A
N/A
N/A
3-1
5-1
5-2
2-2
2-4
2-7
IV
VI
II
I
5-2
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