MB91F376G Fujitsu Components, MB91F376G Datasheet - Page 105

• Manufacturer Part Number: MB91F376G
• Manufacturer: Fujitsu Components

Specifications of MB91F376G

• Lead Free Status / Rohs Status: Not Compliant

(Continued)
*1 : The ICRs are located in the interrupt controller and set the interrupt level for each interrupt request. An ICR is
*2 : The vector address for each EIT (exception, interrupt or trap) is calculated by adding the listed offset to the
*3 : Used by REALOS
*4 : System reserved
*5 : Only available on MB91FV360GA
*6 : USART5/6 in MB91F364G, UART1/2 in all other devices.
*7 : DMA to/from the USARTs in MB91F364G is not implemented.
Delayed interrupt
activation bit
System reserved *
System reserved *
Security vector
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
Used by the INT
instruction.
Remarks:
The 1-Kbyte area from the address specified in TBR is the EIT vector area.
Each vector consists of four bytes. The following formula shows the relationship between the vector number and
vector address.
vctadr = TBR + vctofs
vctadr : Vector address, vctofs : Vector offset,
provided for each interrupt request.
table base register value (TBR) . The TBR specifies the top of the EIT vector table. The addresses listed in the
table are for the default TBR value (0x000FFC00
of the internal boot ROM TBR is set to 0x00FFC00
Interrupt
= TBR + (3FC
3
3
H
- 4 × vct)
Decimal
Interrupt number
255
63
64
65
66
79
80
67
68
69
70
71
72
73
74
75
76
77
78
to
decimal
Hexa-
4C
4D
3F
4A
4B
4E
4F
FF
40
41
42
43
44
45
46
47
48
49
50
to
H
) . The TBR is initialized to this value by a reset.After execution
vct : Vector number
Register
Setting
(ICR63)
(ICR51)
(ICR52)
(ICR53)
(ICR54)
(ICR55)
(ICR56)
(ICR57)
(ICR58)
(ICR59)
(ICR60)
(ICR61)
(ICR62)
ICR47
Interrupt level *
H
.
⎯
⎯
⎯
⎯
Register
address
0x47A
0x47B
0x47C
0x47D
0x47E
0x46F
0x473
0x474
0x475
0x476
0x477
0x478
0x479
0x47F
⎯
⎯
⎯
⎯
1
H
H
H
H
H
H
H
H
H
H
H
H
H
H
MB91360G Series
0x2EC
0x2DC
0x2CC
0x2BC
0x2FC
0x2D8
0x2D4
0x2D0
0x2C8
0x2C4
0x2C0
0x300
0x2F8
0x2F4
0x2F0
0x2E8
0x2E4
0x2E0
0x000
Offset
Interrupt vector *
to
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Default Vector
0x000FFEEC
0x000FFEDC
0x000FFECC
0x000FFEBC
0x000FFEFC
0x000FFEE8
0x000FFEE4
0x000FFEE0
0x000FFED8
0x000FFED4
0x000FFED0
0x000FFEC8
0x000FFEC4
0x000FFEC0
0x000FFEF8
0x000FFEF4
0x000FFEF0
0x000FFC00
0x000FFF00
address
to
2
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
RN
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
105