LH28F320BFHE-PTTL60 Sharp Electronics, LH28F320BFHE-PTTL60 Datasheet - Page 7

• Manufacturer Part Number: LH28F320BFHE-PTTL60
• Manufacturer: Sharp Electronics

Specifications of LH28F320BFHE-PTTL60

• Cell Type: NOR
• Density: 32Mb
• Access Time (max): 60ns
• Interface Type: Parallel
• Boot Type: Top
• Address Bus: 21b
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 11.7 to 12.3V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 16b
• Number Of Words: 2M
• Supply Current: 25mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Compliant

sharp
DQ
WP#/ACC
RY/BY#
Symbol
A
RST#
GND
WE#
OE#
CE#
V
0
0
NC
-A
-DQ
CC
20
15
OPEN DRAIN
OUTPUT
OUTPUT
SUPPLY
SUPPLY
SUPPLY
INPUT/
INPUT/
INPUT
INPUT
INPUT
INPUT
INPUT
Type
ADDRESS INPUTS: Inputs for addresses. 32M: A
DATA INPUTS/OUTPUTS: Inputs data and commands during CUI (Command User
Interface) write cycles, outputs data during memory array, status register, query code,
identifier code and partition configuration register code reads. Data pins float to high-
impedance (High Z) when the chip or outputs are deselected. Data is internally latched
during an erase or program cycle.
CHIP ENABLE: Activates the device’s control logic, input buffers, decoders and sense
amplifiers. CE#-high (V
standby levels.
RESET: When low (V
which provides data protection. RST#-high (V
power-up or reset mode, the device is automatically set to read array mode. RST# must
be low during power-up/down.
OUTPUT ENABLE: Gates the device’s outputs during a read cycle.
WRITE ENABLE: Controls writes to the CUI and array blocks. Addresses and data are
latched on the rising edge of CE# or WE# (whichever goes high first).
WRITE PROTECT: When WP#/ACC is V
Erase or program operation can be executed to the blocks which are not locked and not
locked-down. When WP#/ACC is V
Applying 12V±0.3V to WP#/ACC provides fast erasing or fast programming mode. In
this mode, WP#/ACC is power supply pin. Applying 12V±0.3V to WP#/ACC during
erase/program can only be done for a maximum of 1,000 cycles on each block. WP#/
ACC may be connected to 12V±0.3V for a total of 80 hours maximum. Use of this pin at
12V beyond these limits may reduce block cycling capability or cause permanent
damage.
READY/BUSY#: Indicates the status of the internal WSM (Write State Machine). When
low, WSM is performing an internal operation (block erase, full chip erase, (page buffer)
program or OTP program). RY/BY#-High Z indicates that the WSM is ready for new
commands, block erase is suspended and (page buffer) program is inactive, (page buffer)
program is suspended, or the device is in reset mode.
DEVICE POWER SUPPLY (2.7V-3.6V): With V
flash memory are inhibited. Device operations at invalid V
Characteristics) produce spurious results and should not be attempted.
GROUND: Do not float any ground pins.
NO CONNECT: Lead is not internally connected; it may be driven or floated.
Table 1. Pin Descriptions
LHF32FB2
IL
), RST# resets internal automation and inhibits write operations
IH
) deselects the device and reduces power consumption to
Name and Function
IH
, lock-down is disabled.
IL
, locked-down blocks cannot be unlocked.
IH
0
CC
-A
) enables normal operation. After
≤V
20
LKO
, all write attempts to the
CC
voltage (see DC
Rev. 2.44
4