XPC850ZT50B Freescale Semiconductor, XPC850ZT50B Datasheet - Page 5
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XPC850ZT50B
Manufacturer Part Number
XPC850ZT50B
Description
Manufacturer
Freescale Semiconductor
Datasheet
1.XPC850ZT50B.pdf
(76 pages)
Specifications of XPC850ZT50B
Family Name
MPC8xx
Device Core
PowerQUICC
Device Core Size
32b
Frequency (max)
50MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Supply Voltage (max)
3.465V
Operating Supply Voltage (min)
3.135V
Operating Temp Range
0C to 95C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
BGA
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XPC850ZT50B
Manufacturer:
SHARP
Quantity:
686
Part Number:
XPC850ZT50B
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Part Number:
XPC850ZT50B-0K24A
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Part Number:
XPC850ZT50BU
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
MOTOROLA
• General-purpose timers
• Interrupts
• Single socket PCMCIA-ATA interface
• Communications processor module (CPM)
• Four independent baud-rate generators (BRGs)
• Two SCCs (serial communications controllers)
— Selectable write protection
— On-chip bus arbiter supports one external bus master
— Special features for burst mode support
— Four 16-bit timers or two 32-bit timers
— Gate mode can enable/disable counting
— Interrupt can be masked on reference match and event capture
— Eight external interrupt request (IRQ) lines
— Twelve port pins with interrupt capability
— Fifteen internal interrupt sources
— Programmable priority among SCCs and USB
— Programmable highest-priority request
— Master (socket) interface, release 2.1 compliant
— Single PCMCIA socket
— Supports eight memory or I/O windows
— 32-bit, Harvard architecture, scalar RISC communications processor (CP)
— Protocol-specific command sets (for example,
— Supports continuous mode transmission and reception on all serial channels
— Up to 8 Kbytes of dual-port RAM
— Twenty serial DMA (SDMA) channels for the serial controllers, including eight
— Three parallel I/O registers with open-drain capability
— Can be connected to any SCC, SMC, or USB
— Allow changes during operation
— Autobaud support option
— Ethernet/IEEE 802.3, supporting full 10-Mbps operation
— HDLC/SDLC™ (all channels supported at 2 Mbps)
— HDLC bus (implements an HDLC-based local area network (LAN))
transmission after the current frame is finished or immediately if no frame is
being sent and
for the four USB endpoints
Freescale Semiconductor, Inc.
MPC850 (Rev. A/B/C) Hardware Specifications
CLOSE RXBD
For More Information On This Product,
Go to: www.freescale.com
closes the receive buffer descriptor)
GRACEFUL STOP TRANSMIT
stops
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