N28F001BXT150 Intel, N28F001BXT150 Datasheet - Page 7

• Manufacturer Part Number: N28F001BXT150
• Manufacturer: Intel

Specifications of N28F001BXT150

• Density: 1Mb
• Access Time (max): 150ns
• Interface Type: Parallel
• Boot Type: Top
• Address Bus: 17b
• Operating Supply Voltage (typ): 5V
• Operating Temp Range: 0C to 70C
• Package Type: PLCC
• Program/erase Volt (typ): 11.4 to 12.6V
• Sync/async: Asynchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Word Size: 8b
• Number Of Words: 128K
• Supply Current: 30mA
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / Rohs Status: Not Compliant

A 0 –A 16
DQ 0 –DQ 7
CE#
RP#
OE#
WE#
V
V
GND
PP
CC
Symbol
OUTPUT
INPUT/
INPUT
INPUT
INPUT
INPUT
INPUT
Type
ADDRESS INPUTS for memory addresses. Addresses are internally latched
during a write cycle.
DATA INPUTS/OUTPUTS: Inputs data and commands during memory write
cycles; outputs data during memory, status register and identifier read cycles.
The data pins are active high and float to tri-state off when the chip is deselected
or the outputs are disabled. Data is internally latched during a write cycle.
CHIP ENABLE: Activates the device’s control logic, input buffers, decoders and
sense amplifiers. CE# is active low; CE# high deselects the memory device and
reduces power consumption to standby levels.
POWERDOWN: Puts the device in deep power-down mode. RP# is active low;
RP# high gates normal operation. RP# = V
block. RP# also locks out erase or write operations when active low, providing
data protection during power transitions. RP# active resets internal automation.
Exit from deep power-down sets device to read array mode.
OUTPUT ENABLE: Gates the device’s outputs through the data buffers during a
read cycle. OE# is active low. OE# = V
boot block.
WRITE ENABLE: Controls writes to the command register and array blocks.
WE# is active low. Addresses and data are latched on the rising edge of the
WE# pulse.
ERASE/PROGRAM POWER SUPPLY for erasing blocks of the array or
programming bytes of each block. Note: With V
cannot be altered.
DEVICE POWER SUPPLY: (5 V ±10%)
GROUND
Table 1. Lead Descriptions
Name and Function
HH
(pulsed) allows programming of the
HH
allows programming of the boot
PP
< V
PPL
max, memory contents
28F001BX
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