AM486DX2-66V16BHC AMD (ADVANCED MICRO DEVICES), AM486DX2-66V16BHC Datasheet - Page 55

• Manufacturer Part Number: AM486DX2-66V16BHC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM486DX2-66V16BHC

• Family Name: Am486
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 208
• Package Type: SQFP
• Lead Free Status / Rohs Status: Not Compliant

9
The Enhanced Am486DX microprocessors support two
standard methods for identifying the CPU in a system.
The reported values are assigned based on the RESET
status of the WB/WT pin input (Low = Write-through;
High = Write-back).
9.1
The DX register always contains a component identifier
at the conclusion of RESET. The upper byte of DX (DH)
contains 04 and the lower byte of DX (DL) contains a
CPU type/stepping identifier (see Table 21).
9.2
The Enhanced Am486DX microprocessors implement
the CPUID instruction that makes information available
to software about the family, model and stepping of the
processor on which it is executing. Support of this in-
struction is indicated by the presence of a user-modifi-
able bit in position EFLAGS.21, referred to as the
EFLAGS.ID bit. This bit is reset to zero at device reset
(RESET or SRESET) for compatibility with existing pro-
cessor designs.
9.2.1 CPUID Timing
CPUID execution timing depends on the selected EAX
parameter values (see Table 22).
9.2.2 CPUID Operation
The CPUID instruction requires the user to pass an input
parameter to the CPU in the EAX register. The CPU
response is returned to the user in registers EAX, EBX,
ECX, and EDX. When the parameter passed in EAX is
Am486DX2-66
Am486DX4-100
Am486DX5-133
0F A2 CPUID
Code
OP
Table 22. CPUID Instruction Description
Processor
ENHANCED Am486DX CPU IDENTIFICATION
DX Register at RESET
CPUID Instruction
Instruction
Table 21. CPU ID Codes
Value
Input
EAX
>1
0
1
CLKMUL
0 (x2)
1 (x3)
0 (x4)
Clocks
Core
CPU
41
14
9
Enhanced Am486DX Microprocessor Family
Write-
04F4h
0474h
0494h
Mode
Back
AMD string
CPU ID Register
null registers
P R E L I M I N A R Y
Description
Through
Write-
04E4h
0434h
0484h
Mode
zero, the register values returned upon instruction exe-
cution are:
The values in EBX, ECX, and EDX indicate an AMD
microprocessor. When taken in the proper order:
they decode to
When the parameter passed in EAX is 1, the register
values returned are
The value returned in EAX after CPUID instruction ex-
ecution is identical to the value loaded into EDX upon
device reset. Software must avoid any dependency
upon the state of reserved processor bits.
When the parameter passed in EAX is greater than one,
register values returned upon instruction execution are
EAX[3:0]
EAX[7:4]
EAX[11:8]
EAX[15:12]
EAX[31:16]
EBX[31:0]
ECX[31:0]
EDX[31:0]
EBX (least significant bit to most significant bit)
EDX (least significant bit to most significant bit)
ECX (least significant bit to most significant bit)
AuthenticAMD
EAX[31:0]
EBX[31:0]
ECX[31:0]
EDX[31:0]
Flags affected: No flags are affected.
Exceptions: None
EAX[31:0]
EBX[31:0]
ECX[31:0]
EDX[31:0]
4h or 0100
model:
Enhanced Am486DX CPU:
Family:
486 Instruction Set = 4h
0000
RESERVED
00000000h
00000000h
00000001h = all versions
The 1 in bit 0 indicates that the FPU
is present
Write-through mode = Eh
Write-back mode = Fh
444D4163h
69746E65h
00000001h
68747541h
00000000h
00000000h
00000000h
00000000h
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