SC1200UFH-266 AMD (ADVANCED MICRO DEVICES), SC1200UFH-266 Datasheet - Page 50

• Manufacturer Part Number: SC1200UFH-266
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of SC1200UFH-266

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

3.4.1
3.4.2
50
Signal Name
X32I
X32O
X27I
X27O
CLK27M
PCIRST#
Signal Name
MD[63:0]
MA[12:0]
BA1
BA0
CS1#
CS0#
RASA#
CASA#
WEA#
System Interface (Continued)
Memory Interface Signals
Table 3-3
Table 3-3
Ball No.
Ball No.
on page
on page
AK14
AH27
AK12
AH12
32579B
AL12
AJ13
AJ12
AG3
AH2
AA4
See
See
AJ2
AJ3
A6
40
40
Type
Type
I/O
I/O
I/O
O
O
O
O
O
O
O
O
Description
Crystal Connections. Connected directly to a 32.768
KHz crystal. This clock input is required even if the inter-
nal RTC is not being used. Some of the internal clocks
are derived from this clock. If an external clock is used, it
should be connected to X32I, using a voltage level of 0
volts to V
unconnected.
Crystal Connections. Connected directly to a
27.000 MHz crystal. This clock input is used for video cir-
cuits. Some of the internal clocks are derived from this
clock. If the internal TV encoder is used, a 25 ppm crystal
is recommended. If an external clock is used, it should be
connected to X27I, using a voltage level of 0 volts to V
and X27O should be remain unconnected.
27 MHz Output Clock. Output of crystal oscillator.
PCI and System Reset. PCIRST# is the reset signal for
the PCI bus and system. It is asserted for approximately
100 µs after POR# is negated.
Description
Memory Data Bus. The data bus lines driven to/from
system memory.
Memory Address Bus. The multiplexed row/column
address lines driven to the system memory. Supports
256-Mbit SDRAM.
Bank Address Bits. These bits are used to select the
component bank within the SDRAM.
Chip Selects. These bits are used to select the module
bank within system memory. Each chip select corre-
sponds to a specific module bank. If CS# is high, the
bank(s) do not respond to RAS#, CAS#, and WE# until
the bank is selected again.
Row Address Strobe. RAS#, CAS#, WE# and CKE are
encoded to support the different SDRAM commands.
RASA# is used with CS[1:0]#.
Column Address Strobe. RAS#, CAS#, WE# and CKE
are encoded to support the different SDRAM commands.
CASA# is used with CS[1:0]#.
Write Enable. RAS#, CAS#, WE# and CKE are encoded
to support the different SDRAM commands. WEA# is
used with CS[1:0]#.
CORE
+10% maximum. X32O should remain
AMD Geode™ SC1200/SC1201 Processor Data Book
IO
IDE_DATA5
Signal Definitions
Mux
Mux
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