ISP1562BE STEricsson, ISP1562BE Datasheet - Page 16

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ISP1562BE

Manufacturer Part Number
ISP1562BE
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1562BE

Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Package Type
LQFP
Rad Hardened
No
Lead Free Status / Rohs Status
Supplier Unconfirmed

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NXP Semiconductors
Table 4.
Legend: * reset value
Table 5.
Legend: * reset value
[1]
Table 6.
[1]
ISP1562_3
Product data sheet
Bit
15 to 0
Bit
15 to 0
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
X is 1561h for OHCI1 and OHCI2; X is 1562h for EHCI.
The reserved bits should always be written with the reset value.
Symbol
VID[15:0]
VID - Vendor ID register (address 00h) bit description
DID - Device ID register (address 02h) bit description
CMD - Command register (address 04h) bit allocation
Symbol
DID[15:0]
8.2.1.2 Device ID register
8.2.1.3 Command register
SCTRL
R/W
15
R
0
7
0
Access Value
R
This is a 2-byte read-only register that identifies a particular device. The identifier is
allocated by NXP Semiconductors.
This is a 2-byte register that provides coarse control over the ability of a device to
generate and respond to PCI cycles. The bit allocation of the Command register is given
in
the PCI bus for all accesses, except configuration accesses. All devices are required to
support this base level of functionality. Individual bits in the Command register may or may
not support this base level of functionality.
Access
R
Table
PER
R/W
R/W
14
0
6
0
1131h*
6. When logic 0 is written to this register, the device is logically disconnected from
Value
X*
[1]
Description
Vendor ID: This read-only register value is assigned to NXP Semiconductors by
PCI-SIG as 1131h.
VGAPS
R/W
Description
Device ID: This register value is defined by NXP Semiconductors to identify
the Hi-Speed USB host controller IC product. For the ISP1562, NXP
Semiconductors has defined OHCI functions as 1561h, and the EHCI function
as 1562h.
13
R
0
5
0
Rev. 03 — 14 November 2008
reserved
[1]
MWIE
R/W
R/W
12
0
4
0
Table 5
shows the bit description of the register.
R/W
SC
11
R
0
3
0
R/W
R/W
BM
10
0
2
0
HS USB PCI host controller
FBBE
R/W
R/W
MS
9
0
1
0
© NXP B.V. 2008. All rights reserved.
ISP1562
SERRE
R/W
R/W
IOS
8
0
0
0
15 of 93

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