GS88036BGT-200 GSI TECHNOLOGY, GS88036BGT-200 Datasheet - Page 14

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GS88036BGT-200

Manufacturer Part Number
GS88036BGT-200
Description
SRAM Chip Sync Quad 2.5V/3.3V 9M-Bit 256K x 36 6.5ns/3ns 100-Pin TQFP Tray
Manufacturer
GSI TECHNOLOGY
Datasheet

Specifications of GS88036BGT-200

Package
100TQFP
Timing Type
Synchronous
Density
9 Mb
Data Rate Architecture
SDR
Typical Operating Supply Voltage
2.5|3.3 V
Address Bus Width
18 Bit
Number Of I/o Lines
36 Bit
Number Of Ports
4
Number Of Words
256K
Capacitance
(T
Note:
These parameters are sample tested.
AC Test Conditions
Rev: 1.05 11/2008
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Notes:
1.
2.
3.
V
SS
A
– 2.0 V
Undershoot Measurement and Timing
= 25
Include scope and jig capacitance.
Test conditions as specified with output loading as shown in Fig. 1
unless otherwise noted.
Device is deselected as defined by the Truth Table.
50%
V
V
Input/Output Capacitance
SS
IH
Output reference level
Input reference level
o
C, f = 1 MH
Input Capacitance
Input high level
Input slew rate
Input low level
Parameter
Parameter
Output load
Z
50% tKC
, V
DD
= 2.5 V)
Symbol
DQ
C
C
Conditions
I/O
IN
V
DD
V
1 V/ns
V
Fig. 1
0.2 V
DDQ
DD
– 0.2 V
/2
/2
* Distributed Test Jig Capacitance
Output Load 1
14/24
Test conditions
V
V
V
DDQ/2
OUT
IN
= 0 V
= 0 V
50Ω
V
DD
+ 2.0 V
Overshoot Measurement and Timing
50%
V
V
GS88018/32/36BT-333/300/250/200/150
DD
IL
30pF
*
Typ.
4
6
50% tKC
Max.
5
7
Unit
© 2002, GSI Technology
pF
pF

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