LPC1765FET100,551 NXP Semiconductors, LPC1765FET100,551 Datasheet - Page 58

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LPC1765FET100,551

Manufacturer Part Number
LPC1765FET100,551
Description
IC MCU 32BIT 256KB FLSH 100TFBGA
Manufacturer
NXP Semiconductors
Series
LPC17xxr
Datasheet

Specifications of LPC1765FET100,551

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
100MHz
Connectivity
CAN, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-7565
LPC1765FET100,551

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC1765FET100,551
Manufacturer:
Maxim
Quantity:
37
Part Number:
LPC1765FET100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Table 15.
T
[1]
LPC1769_68_67_66_65_64_63
Product data sheet
Symbol
SSP interface
t
su(SPI_MISO)
amb
Fig 20. MISO line set-up time in SSP Master mode
The peripheral clock for SSP is PCLK = CCLK = 20 MHz.
= 25
°
C; V
Dynamic characteristic: SSP interface
Parameter
SPI_MISO set-up time
DD(3V3)
11.7 SSP interface
MOSI
MISO
shifting edges
SCK
over specified ranges.
All information provided in this document is subject to legal disclaimers.
Conditions
measured in SPI Master mode;
see
Figure 20
Rev. 7 — 5 April 2011
t
su(SPI_MISO)
LPC1769/68/67/66/65/64/63
[1]
32-bit ARM Cortex-M3 microcontroller
Min
30
sampling edges
Typ
002aad326
© NXP B.V. 2011. All rights reserved.
Max
-
Unit
ns
58 of 79

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