PIC18F4585-H/P Microchip Technology, PIC18F4585-H/P Datasheet - Page 307

• Manufacturer Part Number: PIC18F4585-H/P
• Description: IC MCU 8BIT 48KB FLASH 40PDIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4585-H/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 48KB (24K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 23-45: RXFCONn: RECEIVE FILTER CONTROL REGISTER n [0 ≤ n ≤ 1]
REGISTER 23-46: SDFLC: STANDARD DATA BYTES FILTER LENGTH COUNT REGISTER
© 2007 Microchip Technology Inc.
Note:
RXFCON0
RXFCON1
bit 7-0
bit 7-5
bit 4-0
Registers 23-46 through 23-51are writable
in Configuration mode only.
bit 7
Unimplemented: Read as ‘0’
FLC4:FLC0: Filter Length Count bits
Mode 0:
Not used; forced to ‘00000’.
00000-10010 = 0
If DLC3:DLC0 = 0000 No bits will be compared with incoming data bits
If DLC3:DLC0 = 0001 Up to 8 data bits of RXFnEID<7:0>, as determined by FLC2:FLC0, will
If DLC3:DLC0 = 0010 Up to 16 data bits of RXFnEID<15:0>, as determined by FLC3:FLC0,
If DLC3:DLC0 = 0011 Up to 18 data bits of RXFnEID<17:0>, as determined by FLC4:FLC0,
Legend:
R = Readable bit
-n = Value at POR
bit 7
RXFnEN: Receive Filter n Enable bits
0 = Filter is disabled
1 = Filter is enabled
Legend:
R = Readable bit
-n = Value at POR
RXF15EN
Note 1: This register is available in Mode 1 and 2 only.
RXF7EN
Note 1: This register is available in Mode 1 and 2 only.
R/W-0
R/W-0
U-0
—
RXF14EN
RXF6EN
R/W-0
R/W-0
U-0
—
PIC18F2585/2680/4585/4680
18 bits are available for standard data byte filter. Actual number of bits
used depends on DLC3:DLC0 bits (RXBnDLC<3:0> or BnDLC<3:0> if
configured as RX buffer) of message being received.
be compared with the corresponding number of data bits of the
incoming message
will be compared with the corresponding number of data bits of the
incoming message
will be compared with the corresponding number of data bits of the
incoming message
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
RXF13EN RXF12EN RXF11EN RXF10EN RXF9EN
RXF5EN
Preliminary
R/W-1
R/W-0
U-0
—
RXF4EN
R/W-0
FLC4
R/W-1
R/W-1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
RXF3EN
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-1
R/W-0
FLC3
RXF2EN
R/W-0
R/W-1
R/W-0
FLC2
x = Bit is unknown
x = Bit is unknown
RXF1EN
R/W-0
R/W-1
R/W-0
FLC1
(1)
DS39625C-page 305
(1)
RXF0EN
RXF8EN
R/W-1
R/W-0
R/W-0
FLC0
bit 0
bit 0