B300D44A102XXG ON Semiconductor, B300D44A102XXG Datasheet - Page 17

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B300D44A102XXG

Manufacturer Part Number
B300D44A102XXG
Description
IC PROCESSOR AUDIO 24BIT 44DFN
Manufacturer
ON Semiconductor
Series
BelaSigna® 300r
Type
Audio Processorr
Datasheet

Specifications of B300D44A102XXG

Applications
Portable Equipment
Mounting Type
Surface Mount
Package / Case
44-VFDFN
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
B300D44A102XXG
B300D44A102XXGOSTR

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FIFO Controller
from the FIFOs, after being initially configured. Up to eight
FIFOs can be created by the FIFO controller, four in A
memory (AMEM) and four in B memory (BMEM). Each
Memory Maps
The FIFO controller handles the moving of data to and
The structure of the XMEM and YMEM address spaces are shown in Figure 5.
HEAR / FIFO Registers
Math LUT ROM
SIN/COS ROM
H12 Memory
H03 Memory
H13 Memory
H02 Memory
H45 Memory
H23 Memory
H01 Memory
BD Memory
AC Memory
CD Memory
AB Memory
H5 Memory
H4 Memory
H3 Memory
H2 Memory
H1 Memory
H0 Memory
D Memory
C Memory
B Memory
X Memory
X Memory
A Memory
0x10000
0xF800
0xF000
0xE800
0xE000
0xD000
0xC000
0xB000
0xA000
0x9F00
0x9800
0x9400
0x9200
0x9000
0x8E00
0x8C00
0x8B00
0x8A00
0x8900
0x8800
0x8700
0x8600
0x8400
0x8200
0x8000
0x7800
0x1800
0x0800
0x0000
Figure 5. XMEM and YMEM Memory Maps
Y Memory
http://onsemi.com
17
FIFO has a block counter that counts the number of samples
read or written by the IOC. It creates a dedicated interrupt
signal, updates the block counter and updates the FIFO
pointers when a new block has been read or written.
0x10000
0x0800
0x0000
X Memory Map
X Memory / Y Memory Map
(May be used as XY Memory)
Unused

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