B300D44A102XXG ON Semiconductor, B300D44A102XXG Datasheet - Page 24

• Manufacturer Part Number: B300D44A102XXG
• Description: IC PROCESSOR AUDIO 24BIT 44DFN
• Manufacturer: ON Semiconductor
• Series: BelaSigna® 300r
• Type: Audio Processorr

Specifications of B300D44A102XXG

• Applications: Portable Equipment
• Mounting Type: Surface Mount
• Package / Case: 44-VFDFN
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: B300D44A102XXG; B300D44A102XXGOSTR

Power Management Strategy
guarantees valid system operation under any voltage supply
condition to prevent any unexpected audio output as the
result of any supply irregularity. The unit constantly
monitors the power supply and shuts down all functional
units (including all units in the audio path) when the power
supply voltage goes below a level at which point valid
operation can no longer be guaranteed.
the internal regulator that supplies the digital subsystems
(VDDC
T
internal system voltage will then remain at a fixed nominal
voltage (VDDC
voltage to drop below the shutdown internal system voltage
(VDDC
voltage rises again above the startup voltage and remains
there for the length of time T
operating directly off a battery, the system will not power
down until the voltage drops below the VDDC
voltage as the battery dies. This prevents unwanted resets
when the voltage is just on the edge of being too low for the
system to operate properly because the difference between
VDDC
around the VDDC
Other Analog Support Blocks and Functions
Low−Speed A/D Converters (LSAD)
connect to external analog inputs for purposes such as for
reading the value of a potentiometer or an analog sensor
(LSAD[1..4]). The native data format for the LSAD is
10−bit two’s−complement. However, a total of eight
operation modes are provided that allow a configurable
input dynamic range in cases where certain minimum and
maximum values for the converted inputs are desired, such
as in the case of a volume control where only input values
up to a certain magnitude are allowed. Each LSAD channel
is sampled at a nominal frequency of 1.6 kHz when using the
default settings. Each LSAD pin is multiplexed with a GPIO
function (see the General−Purpose Input Output Ports
section) as such the functionality of the pin can be either a
GPIO or an LSAD depending on the configuration.
Battery Monitor
overall system power management. The battery monitor
works by incrementing a counter value every time the
battery voltage goes below a desired, configurable threshold
value. This counter value can be used in an application−
specific power−management algorithm running on the
CFX. The CFX can initiate any desired actions once the
battery hits a predetermined value.
POR
BelaSigna 300 has a built−in power management unit that
Once the supply voltage rises above the startup voltage of
The BelaSigna 300 chip has four LSAD channels that
A programmable on−chip battery monitor is available for
, a POR will occur. If the supply is consistent, the
STARTUP
STARTUP
SHUTDOWN
NOMINAL
and VDDC
) and remains there for the length of time
SHUTDOWN
), the system will shut down. If the
). If a spike occurs that causes the
SHUTDOWN
point.
POR
, a POR will occur. If
prevents oscillation
SHUTDOWN
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Digital Interfaces
General−Purpose Input Output (GPIO) Ports
external digital inputs such as push buttons, or digital outputs
such as the control or trigger of an external companion chip
(GPIO[0..4]). The direction of these ports (input or output) is
configurable and each pin has an internal pull−up resistor
when configured as a GPIO. A read from an unconnected pin
will give a value of logic 1. Four of the five GPIO pins are
multiplexed with an LSAD (see the Low−Speed A.D
Converters section) and as such the functionality of the pin
can be either a GPIO or an LSAD depending on the
configuration. Note that GPIO0 cannot be used as an LSAD.
Inter−IC Communication (I
can be used for high−speed transmission of data between
BelaSigna 300 and an external device. The interface
operates at speeds up to 400 Kbit/sec for system clocks
(EXT_CLK) higher than 1.6 MHz. In product development
mode, the I
purposes, communicating with the BelaSigna 300
development tools. The interface can be configured to
operate in either master mode or slave mode.
Serial Peripheral Interface (SPI) Port
such as communication with a non−volatile memory
(EEPROM). The I/O levels on this port are defined by the
voltage on the VDDO_SPI pin on the DFN package option,
whereas it is defined by VBAT on the WLCSP package
option. The SPI port operates in master mode only, which
supports communications with slave SPI devices.
mode, so it will only communicate with SPI slave devices.
When connecting to an SPI slave device other than a boot
EEPROM, the SPI_CS pin should be left unconnected and
the slave device CS line should be driven from a GPIO to
avoid BelaSigna 300 boot malfunction. When connecting to
an SPI EEPROM for boot, the designer can choose to
connect the SPI_CS pin to the EEPROM or use a GPIO (high
at boot) for a design with several daisy-chained SPI devices.
PCM Interface
modulation (PCM) interface that can be used to stream
signal, control and configuration data into and out of the
device. The I/O levels on this port are defined by the voltage
on the VDDO pin (VBAT on the WLCSP package option).
UART Interface
for RS−232 compatible communications. The baud rate
(bits/second) of this interface is typically configurable within
a range of 0.4 to 320 kbps, depending on the application’s
system clock. The I/O levels on this port are defined by the
voltage on the VDDO pin (VBAT on the WLCSP option).
BelaSigna 300 has five GPIO ports that can connect to
The I
An SPI port is available on BelaSigna 300 for applications
The SPI port on BelaSigna 300 only supports master
BelaSigna 300 includes a highly configurable pulse code
A general−purpose two−pin UART interface is available
2
C interface is an industry−standard interface that
2
C interface is used for application debugging
2
C) Interfaces