MT46V32M16BN-6:FTR Micron Technology Inc, MT46V32M16BN-6:FTR Datasheet - Page 82

• Manufacturer Part Number: MT46V32M16BN-6:FTR
• Manufacturer: Micron Technology Inc

Specifications of MT46V32M16BN-6:FTR

• Lead Free Status / Rohs Status: Compliant

Figure 47:
PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 512Mb DDR: Rev. N; Core DDR Rev. B 2/09 EN
Command
Address
t DQSS (NOM)
t DQSS (MIN)
t DQSS (MAX)
DQS
DQS
DQS
CK#
DM
DM
DM
DQ
DQ
DQ
CK
WRITE-to-PRECHARGE – Odd Number of Data, Interrupting
Bank a,
Notes:
WRITE
Col b
T0
t DQSS
t DQSS
t DQSS
1. DI b = data-in for column b.
2. An interrupted burst of 8 is shown; one data element is written.
3.
4. A10 is LOW with the WRITE command (auto precharge is disabled).
5. DQS is required at T4 and T4n (nominal case) to register DM.
6. If the burst of 4 is used, DQS and DM are not required at T3, T3n, T4, and T4n.
t
DI
b
WR is referenced from the first positive CK edge after the last data-in pair.
NOP
DI
T1
b
DI
b
T1n
NOP
T2
T2n
t WR
82
NOP
T3
T3n
Micron Technology, Inc., reserves the right to change products or specifications without notice.
(a or all)
Bank,
T4
PRE
512Mb: x4, x8, x16 DDR SDRAM
T4n
Transitioning Data
T5
NOP
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t RP
T6
NOP
Operations
Don’t Care