AT89C51ID2-SLSIM Atmel, AT89C51ID2-SLSIM Datasheet - Page 13

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AT89C51ID2-SLSIM

Manufacturer Part Number
AT89C51ID2-SLSIM
Description
C51ID2 64KF TWI 32KHZ PLCC44 3-5.5V IND.
Manufacturer
Atmel
Datasheet

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Table 15. Pin Description (Continued)
13
RST
ALE/PROG
PSEN
EA
Mnemonic
AT89C51ID2
PLCC44
12
10
33
32
35
Pin Number
VQFP44
6
27
26
29
4
Type
O (I)
I/O
O
I
I
Name and Function
SDA (PI2.1): 2-wire Serial Data
SDA is the bidirectional 2-wire data line
Reset: A high on this pin for two machine cycles while the oscillator is running, resets the
device. An internal diffused resistor to V
capacitor to V
Address Latch Enable/Program Pulse: Output pulse for latching the low byte of the
address during an access to external memory. In normal operation, ALE is emitted at a
constant rate of 1/6 (1/3 in X2 mode) the oscillator frequency, and can be used for external
timing or clocking. Note that one ALE pulse is skipped during each access to external data
memory. This pin is also the program pulse input (PROG) during Flash programming. ALE
can be disabled by setting SFR’s AUXR.0 bit. With this bit set, ALE will be inactive during
internal fetches.
Program Strobe ENable: The read strobe to external program memory. When executing
code from the external program memory, PSEN is activated twice each machine cycle,
except that two PSEN activations are skipped during each access to external data memory.
PSEN is not activated during fetches from internal program memory.
External Access Enable: EA must be externally held low to enable the device to fetch
code from external program memory locations 0000H to FFFFH. If security level 1 is pro-
grammed, EA will be internally latched on Reset.
CC
. This pin is an output when the hardware watchdog forces a system reset.
SS
permits a power-on reset using only an external
4289C–8051–11/05

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