AT89C51ID2-SLSIM Atmel, AT89C51ID2-SLSIM Datasheet - Page 88

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AT89C51ID2-SLSIM

Manufacturer Part Number
AT89C51ID2-SLSIM
Description
C51ID2 64KF TWI 32KHZ PLCC44 3-5.5V IND.
Manufacturer
Atmel
Datasheet

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Figure 33. Format and State in the Master Receiver Mode
4289C–8051–11/05
Successfull
transmission
to a slave
receiver
Next transfer
started with a
repeated start
condition
Not acknowledge
received after the
slave address
Arbitration lost in slave
address or acknowledge bit
Arbitration lost and
addressed as slave
From master to slave
From slave to master
08h
S
SLA
R
A or A
MR
Data
40h
A
A
48h
38h
A
68h
n
Other master
Other master
78h
continues
continues
P
Data
A
B0h
Any number of data bytes and their associated
acknowledge bits
This number (contained in SSCS) corresponds
to a defined state of the 2-wire bus
50h
A
Data
To corresponding
states in slave mode
58h
A
38h
A
Other master
10h
continues
S
P
AT89C51ID2
SLA
W
R
MT
88

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