AT89C51ID2-SLSIM Atmel, AT89C51ID2-SLSIM Datasheet - Page 86

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AT89C51ID2-SLSIM

Manufacturer Part Number
AT89C51ID2-SLSIM
Description
C51ID2 64KF TWI 32KHZ PLCC44 3-5.5V IND.
Manufacturer
Atmel
Datasheet

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Figure 32. Format and State in the Master Transmitter Mode
4289C–8051–11/05
Successfull
transmission
to a slave
receiver
Next transfer
started with a
repeated start
condition
Not acknowledge
received after the
slave address
Not acknowledge
received after a data
byte
Arbitration lost in slave
address or data byte
Arbitration lost and
addressed as slave
From master to slave
From slave to master
08h
S
SLA
W
A or A
Data
MT
18h
A
A
20h
38h
A
68h
n
Other master
Other master
78h
continues
continues
P
A
Data
B0h
Any number of data bytes and their associated
acknowledge bits
This number (contained in SSCS) corresponds
to a defined state of the 2-wire bus
A or A
28h
A
A
38h
30h
To corresponding
states in slave mode
Other master
continues
P
S
10h
P
SLA
AT89C51ID2
W
R
MR
86

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