DS3170+ Maxim Integrated Products, DS3170+ Datasheet - Page 186
![IC TXRX DS3/E3 100-CSBGA](/photos/6/94/69414/100-csbga_21-0153b_sml.jpg)
DS3170+
Manufacturer Part Number
DS3170+
Description
IC TXRX DS3/E3 100-CSBGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS3170.pdf
(230 pages)
Specifications of DS3170+
Function
Single-Chip Transceiver
Interface
DS3, E3
Number Of Circuits
1
Voltage - Supply
3.135 V ~ 3.465 V
Current - Supply
120mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LBGA
Includes
DS3 Framers, E3 Framers, HDLC Controller, On-Chip BERTs
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
- Current page: 186 of 230
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120h
122h
124h
126h
128h
12Ah
12Ch
12Eh
130h
132h
134h
136h
138h
13Ah
13Ch
13Eh
12.9.4 Receive G.751 E3 Register Map
The receive G.751 E3 utilizes eight registers.
Table 12-25. Receive G.751 E3 Framer Register Map
Address
12.9.4.1 Register Bit Descriptions
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bit 13: Receive FEAC Data Link Source (DLS) – When 0, the receive FEAC controller will be sourced from the N
bit. When 1, the receive FEAC controller will be sourced from the A bit.
Bit 12: Manual Downstream AIS Insertion (MDAISI) – When 0, manual downstream AIS insertion is disabled.
When 1, manual downstream AIS insertion is enabled.
Bit 11: Automatic Downstream AIS Disable (AAISD) – When 0, the presence of an LOS, OOF, or AIS condition
will cause downstream AIS to be inserted. When 1, the presence of an LOS, OOF, or AIS condition will not cause
downstream AIS to be inserted.
Bit 10: Error Count Control (ECC) – When 0, framing errors will not be counted if an OOF or AIS condition is
present. When 1, framing errors will be counted regardless of the presence of an OOF or AIS condition.
Reserved
RAILE
15
E3G751.RCR
E3G751.RSR1
E3G751.RSR2
E3G751.RSRL1
E3G751.RSRL2
E3G751.RSRIE1
E3G751.RSRIE2
E3G751.RFECR
0
7
0
Register
Reserved
--
--
--
--
--
--
--
--
RAILD
14
0
6
0
E3G751.RCR
E3 G.751 Receive Control Register
120h
E3 G.751 Receive Control Register
Reserved
E3 G.751 Receive Status Register #1
E3 G.751 Receive Status Register #2
E3 G.751 Receive Status Register Latched #1
E3 G.751 Receive Status Register Latched #2
E3 G.751 Receive Status Register Interrupt Enable #1
E3 G.751 Receive Status Register Interrupt Enable #2
Reserved
Reserved
E3 G.751 Receive Framing Error Count Register
Reserved
Reserved
Reserved
Unused
Unused
Register Description
RAIOD
DLS
13
0
5
0
186 of 230
MDAISI
RAIAD
12
0
4
0
ROMD
AAISD
11
0
3
0
DS3170 DS3/E3 Single-Chip Transceiver
ECC
LIP1
10
0
2
0
FECC1
LIP0
9
0
1
0
FRSYNC
FECC0
8
0
0
0
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