DS3170+ Maxim Integrated Products, DS3170+ Datasheet - Page 75
![IC TXRX DS3/E3 100-CSBGA](/photos/6/94/69414/100-csbga_21-0153b_sml.jpg)
DS3170+
Manufacturer Part Number
DS3170+
Description
IC TXRX DS3/E3 100-CSBGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS3170.pdf
(230 pages)
Specifications of DS3170+
Function
Single-Chip Transceiver
Interface
DS3, E3
Number Of Circuits
1
Voltage - Supply
3.135 V ~ 3.465 V
Current - Supply
120mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LBGA
Includes
DS3 Framers, E3 Framers, HDLC Controller, On-Chip BERTs
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
- Current page: 75 of 230
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Table 10-18
Table 10-18. Line AIS Enable Modes
Table 10-19
Table 10-19. Payload (Downstream) AIS Enable Modes
10.5.4 Loop Timing Mode
Loop timing mode is enabled by setting the PORT.CR3.LOOPT bit. This mode replaces the clock from the TCLKI
pin with the internal receive clock from either the RLCLK pin if the RX LIU is disabled, or the recovered clock from
the RX LIU if it is enabled. The loop timing mode can be activated in any framing or line interface mode.
10.5.5 HDLC Overhead Controller
The data signal to the receive HDLC controller will be forced to a one while still being clocked when the framer
(DS3, E3), to which the HDLC is connected, detects LOF or AIS. Forcing the data signal to all ones will cause an
HDLC packet abort if the data started to look like a packet instead of allowing a bad, and possibly very long, HDLC
packet.
10.5.6 Trail Trace
There is a single Trail Trace controller for use in line maintenance protocols. The E3-G.832 framer has access to
the trail trace controller.
10.5.7 BERT
There is a Bit Error Rate Test (BERT) circuit for use in generating and detecting test signals in the payload bits.
The BERT can generate and detect PRBS patterns up to 2^32-1 bits as well as repeating patterns up to 32 bits
PORT.CR1
PORT.CR1
PAIS[2:0]
LAIS[1:0]
000
001
010
011
100
101
110
111
00
00
01
10
10
11
lists the LAIS decodes for various line AIS enable modes.
lists the PAIS decodes for various payload AIS enable modes.
Always
When LLB (no DLB) active
When PLB active
When LLB(no DLB) or PLB active
When LOS (no DLB) active
When OOF active
When OOF, LOS. LLB (no DLB), or
PLB active
Never
FRAME MODE
DS3
DS3
Any
Any
E3
E3
WHEN AIS IS SENT
Automatic AIS when DLB is enabled
Automatic AIS when DLB is enabled
(PORT.CR4.LBM = 1XX)
DESCRIPTION
Send UA1
Send AIS
Send AIS
75 of 230
Disable
AIS CODE
none
UA1
UA1
UA1
UA1
UA1
UA1
UA1
DS3170 DS3/E3 Single-Chip Transceiver
AIS CODE
DS3AIS
DS3AIS
none
UA1
UA1
UA1
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