SC16C752BIBS,128 NXP Semiconductors, SC16C752BIBS,128 Datasheet - Page 27

• Manufacturer Part Number: SC16C752BIBS,128
• Description: IC DUAL UART 64BYTE 32HVQFN
• Manufacturer: NXP Semiconductors

Specifications of SC16C752BIBS,128

• Features: False-start Bit Detection
• Number Of Channels: 2, DUART
• Fifo's: 64 Byte
• Voltage - Supply: 2.5V, 3.3V, 5V
• With Auto Flow Control: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: Surface Mount
• Package / Case: 32-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935276389128; SC16C752BIBS-F; SC16C752BIBS-F

NXP Semiconductors
SC16C752B
Product data sheet
7.8 Interrupt Enable Register (IER)
The Interrupt Enable Register (IER) enables each of the six types of interrupt, receiver
error, RHR interrupt, THR interrupt, Xoff received, or CTSn/RTSn change of state from
LOW to HIGH. The INTA/INTB output signal is activated in response to interrupt
generation.
Table 16.
[1]
Bit
7
6
5
4
3
2
1
0
IER[7:4] can only be modified if EFR[4] is set, i.e., EFR[4] is a write enable. Re-enabling IER[1] will not
cause a new interrupt if the THR is below the threshold.
Symbol
IER[7]
IER[6]
IER[5]
IER[4]
IER[3]
IER[2]
IER[1]
IER[0]
Interrupt Enable Register bits description
Table 16
[1]
[1]
[1]
[1]
All information provided in this document is subject to legal disclaimers.
Description
CTS interrupt enable.
RTS interrupt enable.
Xoff interrupt.
Sleep mode.
Modem Status Interrupt.
Receive Line Status interrupt.
Transmit Holding Register interrupt.
Receive Holding Register interrupt.
5 V, 2.2 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs
logic 0 = disable the CTS interrupt (normal default condition)
logic 1 = enable the CTS interrupt
logic 0 = disable the RTS interrupt (normal default condition)
logic 1 = enable the RTS interrupt
logic 0 = disable the Xoff interrupt (normal default condition)
logic 1 = enable the Xoff interrupt
logic 0 = disable Sleep mode (normal default condition)
logic 1 = enable Sleep mode. See
logic 0 = disable the Modem Status Register interrupt (normal default
condition)
logic 1 = enable the Modem Status Register interrupt
logic 0 = disable the receiver line status interrupt (normal default condition)
logic 1 = enable the receiver line status interrupt
logic 0 = disable the THR interrupt (normal default condition)
logic 1 = enable the THR interrupt
logic 0 = disable the RHR interrupt (normal default condition)
logic 1 = enable the RHR interrupt
shows Interrupt Enable Register bit settings.
Rev. 6 — 30 November 2010
Section 6.7 “Sleep mode”
SC16C752B
© NXP B.V. 2010. All rights reserved.
for details.
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