SC28L91A1B,551 NXP Semiconductors, SC28L91A1B,551 Datasheet - Page 14

• Manufacturer Part Number: SC28L91A1B,551
• Description: IC UART SINGLE W/FIFO 44-PQFP
• Manufacturer: NXP Semiconductors
• Series: IMPACTr
• Type: Single Channel UARTr

Specifications of SC28L91A1B,551

• Number Of Channels: 1, UART
• Package / Case: 44-MQFP, 44-PQFP
• Features: False-start Bit Detection
• Fifo's: 16 Byte
• Voltage - Supply: 3.3V, 5V
• With Auto Flow Control: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Data Rate: 0.2304 MBd
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 3 V
• Supply Current: 25 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V or 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-1187; 935267419551; SC28L91A1B-S

Philips Semiconductors
AC CHARACTERISTICS (3.3 VOLT)
V
2004 Oct 21
Symbol
Reset Timing (See Figure 4)
t
Bus Timing
t
t
t
t
t
t
t
t
t
t
t
t
Port Timing
t
t
t
Interrupt Timing (See Figure 10)
t
Clock Timing (See Figure 11)
t
f
f
f
t
f
t
f
Transmitter Timing, external clock (See Figure 12)
t
t
CC
RES
*AS
*AH
*CS
*CH
*RW
*DD
*DA
*DF
*DI
*DS
*DH
*RWD
*PS
*PH
*PD
*IR
*CLK
*CLK
*CTC
*CTC
*RX
*RX
*TX
*TX
*TXD
*TCS
3.3 V or 5.0 V Universal Asynchronous
Receiver/Transmitter (UART)
= 3.3 V
5
5
10 %, T
(See Figure 5)
(See Figure 9)
Parameter
Reset pulse width
A0–A3 setup time to RDN, WRN Low
A0–A3 hold time from RDN, WRN low
CEN setup time to RDN, WRN low
CEN Hold time from RDN. WRN low
WRN, RDN pulse width (Low time)
Data valid after RDN low (125pF load. See Figure 3 for smaller loads.)
RDN low to data bus active
Data bus floating after RDN or CEN high
RDN or CEN high to data bus invalid
Data bus setup time before WRN or CEN high (write cycle)
Data hold time after WRN high
High time between read and/or write cycles
Port in setup time before RDN low (Read IP ports cycle)
Port in hold time after RDN high
OP port valid after WRN or CEN high (OPR write cycle)
INTRN (or OP3–OP7 when used as interrupts) negated from:
X1/CLK high or low time
X1/CLK frequency
C/T Clk (IP2) high or low time (C/T external clock input)
C/T Clk (IP2) frequency
RxC high or low time (16X)
RxC Frequency (16X) (for higher speeds contact factory)
RxC Frequency (1x)
TxC High or low time (16X)
TxC frequency (16X) (for higher speeds contact factory)
TxC frequency (1X)
TxD output delay from TxC low (TxC input pin)
Output delay from TxC output pin low to TxD data output
Read RxFIFO (RxRDY/FFULL interrupt)
Write TxFIFO (TxRDY interrupt)
Reset Command (delta break change interrupt)
Stop C/T command (Counter/timer interrupt)
Read IPCR (delta input port change interrupt)
Write IMR (Clear of change interrupt mask bit(s))
amb
= –40 C to +85 C, unless otherwise specified.
8
8, 9
(for higher speeds contact factory)
8, 9
8
(for higher speeds contact factory)
6
1, 2, 3, 4
7
5, 7
14
Min
100
10
33
0
0
20
0
0
43
0
27
0
0
35
0.1
30
0
30
0
0
30
0
Typ
20
6
10
46
15
–15
–20
–20
50
40
40
40
40
40
40
25
3.686
15
10
15
40
8
Max
75
20
75
79
79
79
79
79
79
8
8
16
1
16
1
78
30
SC28L91
Product data sheet
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
ns
MHz
ns
MHz
MHz
ns
MHz
MHz
ns
ns