C8051F502-IMR Silicon Laboratories Inc, C8051F502-IMR Datasheet - Page 105
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C8051F502-IMR
Manufacturer Part Number
C8051F502-IMR
Description
MCU 8-Bit C8051F50x 8051 CISC 64KB Flash 2.5V/3.3V/5V 32-Pin QFN EP T/R
Manufacturer
Silicon Laboratories Inc
Datasheet
1.C8051F502-IM.pdf
(312 pages)
Specifications of C8051F502-IMR
Package
32QFN EP
Device Core
8051
Family Name
C8051F50x
Maximum Speed
50 MHz
Ram Size
4.25 KB
Program Memory Size
64 KB
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Program Memory Type
Flash
Number Of Programmable I/os
25
Interface Type
I2C/SPI/UART
On-chip Adc
32-chx12-bit
Operating Temperature
-40 to 125 °C
Number Of Timers
4
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On the execution of the RETI instruction in the CAN0 ISR, the value in SFRPAGE register is overwritten
with the contents of SFRNEXT. The CIP-51 may now access the SPI0DAT register as it did prior to the
interrupts occurring. See Figure 13.6.
SFRPAGE
SFRNEXT
SFRNEXT
popped to
SFRLAST
popped to
Figure 13.5. SFR Page Stack Upon Return From PCA Interrupt
(SPI0DAT)
stack on return from
popped off of the
(CAN0)
SFR Page 0x0
Automatically
0xC
0x0
interrupt
Rev. 1.2
C8051F50x/F51x
SFRPAGE
SFRNEXT
SFRLAST
105
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