SC16C2550IB48,128 NXP Semiconductors, SC16C2550IB48,128 Datasheet - Page 10
![IC DUART SOT313-2](/photos/31/31/313101/sot313-2_sml.jpg)
SC16C2550IB48,128
Manufacturer Part Number
SC16C2550IB48,128
Description
IC DUART SOT313-2
Manufacturer
NXP Semiconductors
Datasheet
1.SC16C2550IN40112.pdf
(46 pages)
Specifications of SC16C2550IB48,128
Features
2 Channels
Number Of Channels
2, DUART
Fifo's
16 Byte
Voltage - Supply
3.5 V ~ 4.5 V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
48-LQFP
Transmit Fifo
16Byte
Receive Fifo
16Byte
Transmitter And Receiver Fifo Counter
Yes
Data Rate
5Mbps
Package Type
LQFP
Operating Supply Voltage (max)
5.5V
Mounting
Surface Mount
Pin Count
48
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935270020128
SC16C2550IB48-T
SC16C2550IB48-T
SC16C2550IB48-T
SC16C2550IB48-T
Philips Semiconductors
9397 750 11621
Product data
6.2 Internal registers
Table 3:
The SC16C2550 provides two sets of internal registers (A and B) consisting of
12 registers each for monitoring and controlling the functions of each channel of the
UART. These registers are shown in
holding registers (THR/RHR), interrupt status and control registers (IER/ISR), a FIFO
control register (FCR), line status and control registers (LCR/LSR), modem status
and control registers (MCR/MSR), programmable data rate (clock) control registers
(DLL/DLM), and a user accessible scratchpad register (SPR).
Table 4:
[1]
[2]
[3]
Chip Select
CSA-CSB = 1
CSA = 0
CSB = 0
A2
General register set (THR/RHR, IER/ISR, MCR/MSR, FCR, LSR, SPR)
0
0
0
0
1
1
1
1
Baud rate register set (DLL/DLM)
0
0
Enhanced register set (EFR, Xon/off 1-2)
0
1
1
1
1
These registers are accessible only when LCR[7] is a logic 0.
These registers are accessible only when LCR[7] is a logic 1.
Enhanced Feature Register, Xon1, 2 and Xoff1, 2 are accessible only when the LCR is set to
‘BF(HEX)’.
A1
0
0
1
1
0
0
1
1
0
0
1
0
0
1
1
Serial port selection
Internal registers decoding
A0
0
1
0
1
0
1
0
1
0
1
0
0
1
0
1
Dual UART with 16 bytes of transmit and receive FIFOs and IrDA
Rev. 03 — 19 June 2003
READ mode
Receive Holding Register
Interrupt Status Register
Line Status Register
Modem Status Register
Scratchpad Register
LSB of Divisor Latch
MSB of Divisor Latch
Enhanced Feature Register
Xon1 word
Xon2 word
Xoff1 word
Xoff2 word
Function
none
UART channel A
UART channel B
[2]
Table
[3]
4. The UART registers function as data
WRITE mode
Transmit Holding Register
Interrupt Enable Register
FIFO Control Register
Line Control Register
Modem Control Register
n/a
n/a
Scratchpad Register
LSB of Divisor Latch
MSB of Divisor Latch
Enhanced Feature Register
Xon1 word
Xon2 word
Xoff1 word
Xoff2 word
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
SC16C2550
[1]
encoder/decoder
10 of 46