ISD5216EY Nuvoton Technology Corporation of America, ISD5216EY Datasheet

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ISD5216 minutes voice record/playback device with integrated codec Publication Release Date: July 17, 2007 - 1 - Revision B.5 ...

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GENERAL DESCRIPTION The ChipCorder ISD5216 minute Voice and Data Record and Playback system with integrated Voice band CODEC. The device works on a single 2.7V to 3.3V supply, and has fully integrated system functions, ...

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BLOCK DIAGRAM 2.2V Voltage MICBS reference 1 MICROPHONE (AGPD) MIC+ MIC IN AGC MIC - 1 (AGPD) AGCCAP AUX IN FILTO ARRAY 1 (INS0) AUX IN AUX IN AMP 1 DAO (AXPD AXG0 2 AXG1 ÷2 MCLK ...

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TABLE OF CONTENTS 1. GENERAL DESCRIPTION ......................................................................................................... 2 2. FEATURES ................................................................................................................................. 2 3. BLOCK DIAGRAM ...................................................................................................................... 3 4. TABLE OF CONTENTS .............................................................................................................. 4 5. PIN CONFIGURATION ............................................................................................................... 7 6. PIN DESCRIPTION..................................................................................................................... 8 7. FUNCTIONAL DESCRIPTION.................................................................................................... 9 7.1. MEMORY ORGANIZATION...............................................................................................11 ...

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Message Cueing.....................................................................................................26 7.6. digital mode ........................................................................................................................ 26 7.6.1. Writing Data .............................................................................................................. 26 7.6.2. Reading Data ............................................................................................................26 7.6.3. Erasing Data ............................................................................................................. 27 7.6.4. Load Configuration Registers ...................................................................................27 7.7. ISD5216 ANALOG STRUCTURE (Left Half) description ..................................................31 7.7.1 Speaker, AUX OUT and ...

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PACKAGE SPECIFICATIONG ............................................................................................... 70 12.1. PLASTIC THIN SMALL OUTLINE PACKAGE (TSOP) TYPE E DIMENSIONS.............. 70 12.2. Plastic Small Outline Integrated Circuit (SOIC) DIMENSIONS .......................................71 12.3. Plastic Dual Inline Package (PDIP) Dimensions..............................................................72 13. ORDERING INFORMATION................................................................................................... 73 14. VERSION HISTORY ............................................................................................................... ...

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PIN CONFIGURATION ISD5216 TSOP V CCD SCL A1 SDA A0 V SSD V V MIC- MIC+ MICBS ACAP SP- V Please note that the pin assignments are different for the PDIP and the SOIC packages ...

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PIN DESCRIPTION Pin Name Pin No. Pin No. 28-pin 28-pin TSOP PDIP RAC INT MCLK 6 27 SCL 9 2 SDA MIC MIC ...

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FUNCTIONAL DESCRIPTION The ISD5216 ChipCorder Product provides high quality, fully integrated, single-chip Record/Playback solutions for 8- to 16-minute messaging applications that are ideal for use in PBX systems, cellular phones, automotive communications, GPS/navigation systems, and other portable products. The ...

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Minus any pages selected for digital storage One of the benefits of Winbond’s ChipCorder technology is the use of on-chip nonvolatile memory, which provides zero-power message storage. A message is retained for up to 100 years (typically) without power. ...

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MEMORY ORGANIZATION The ISD5216 memory array is arranged as 1888 rows (or pages) of 2048 bits, for a total memory of 3,866,624 bits. The primary addressing for the 2048 pages is handled by 11 bits of address data in ...

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The following diagram shows the functional blocks in the CODEC: 7.2.1. Analog Input to Digital Output Path A 200 kHz anti-aliasing filter processes the analog input signal before entering the amplifier for the A/D converter. The gain of this amplifier ...

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Digital Input to Analog Output Path The digital input interface must be selected to either PCM the configuration register. The compression format must also be selected with bits (LAW1 – LAW0) in the configuration registers. The ...

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ChipCorder Analog Array Sampling Frequency With External Clock If an external master clock is used, the clock dividers must be set according to the following table to get the filter cut-off frequency and sample rate setup correctly. The duty ...

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I C INTERFACE 2 The I C interface is for bi-directional, two-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected ...

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Bit transfer One data bit is transferred during each clock pulse. The data on the SDA line must remain stable during the HIGH period of the clock pulse, as changes in the data line at this time will be ...

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Additional ISD5216 flow control 2 The I C Interface in the ISD5216 differs from the standard implementation in the way the SCL line is also used for flow control. The ISD5216 will hold the clock line low until it ...

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Master Reads from Slave immediately after first byte (Read Mode) acknowledgement from slave S SLAVE ADDRESS R A From Master Start Bit R/W From From Master Master Another common operation in the ISD5216 is the reading of digital data from ...

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I C Slave Address The ISD5216 has a 7 bit slave address of <100 00xy> where x and y are equal to the state, respectively, of the external address pins A1 and A0. Because all data bytes are ...

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I2S SERIAL INTERFACE As shown in the following figure, the bus has three lines: • continuous serial clock (SCK) • word select (WS) • serial data (SDIO)and the device generating SCK and WS is the master. Simple System Configurations ...

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Note that the specifications are defined by the transmitter speed. The specification of the receiver has to be able to ...

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CONTROL REGISTERS The ISD5216 is controlled by loading commands to, or reading commands from the internal command, configuration and address registers. The Command byte sent is used to start and stop recording, write or read digital data and perform ...

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Function Bits The command byte function bits are detailed in the table to the right. C6, the DAB bit, determines whether the device is performing an analog or digital function. The other bits are decoded to produce the individual ...

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OPCODE Command Byte Table OPCODE COMMAND BIT NUMBER POWER UP POWER DOWN STOP (DO NOTHING) STAY ON STOP (DO NOTHING) STAY OFF LOAD ADDRESS LOAD CFG0 LOAD CFG1 LOAD CFG2 RECORD ANALOG RECORD ANALOG @ ADDR PLAY ANALOG PLAY ...

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Power-up The ISD5216 must be powered up before sending any other commands. Wait for Tpud time before sending the next command. 7.5.6. Read Status When the device is polled with the Read Status command, it will return three bytes ...

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Playback Mode The command sequence for an analog playback operation from a given address is the Slave Address (80h), the Command Byte (A9h) for Play Analog @ Address, and the two address bytes. If The Play Analog (A8h) is ...

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As with Digital Write, Digital Read can be done a “block” time. Thus, only 64 bits need to be read in each Digital Read command sequence. 7.6.3. Erasing Data The Digital Erase command can only erase an entire ...

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Bit no. Signal D0 (LSB) VLPD Power down the Volume Control. D1 OPA0 Power down Speaker driver and/or Auxiliary output. D2 OPA1 Power down Speaker driver and/or Auxiliary output. D3 OPS0 Select speaker output multiplexer. D4 OPS1 Select speaker output ...

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Bit no. Signal D0 (LSB) AGPD Power down the Microphone AGC D1 FLPD Power down the Filter D2 FLD0 Set the duration and sample rate of the ChipCorder D3 FLD1 Set the duration and sample rate of the ChipCorder D4 ...

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Bit no. Signal D0 (LSB) ADPD Power down the Analog to Digital converter D1 DAPD Power down the Digital to Analog converter D2 LAW0 Select digital μ -Law or A-Law input/output format D3 LAW1 Select digital μ -Law or A-Law ...

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ISD5216 ANALOG STRUCTURE (LEFT HALF) description INP INP AGC AMP AGC AMP SUM1 MUX SUM1 MUX AUX IN AUX IN FILTO FILTO 1 1 ARRAY ARRAY (INS0) (INS0) DAC OUT DAC OUT S1S0 ...

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ISD5216 ANALOG STRUCTURE (Right Half) description FLS0 Select input from MLS array or sum 1 amp 0 SUM1 1 ARRAY CKD2 Divide Master Clock Divide Divide by 2 Configuration Register CFG0, CFG1 ...

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Speaker, AUX OUT and Volume Control Description VLPD Switch control on or off 0 Power Up 1 Power Down VLS1 VLS0 Select input VOL2 source to the volume mux DAC OUT SUM2 0 ...

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Microphone and Auxiliary Inputs Internal to the device C 0.1 ìF COUP = Ra ANA IN Input 1 f NOTE: CUTTOFF 2xR a 2.2V Voltage Configuration Register CFG0, CFG1 and CFG2. The bits described on this page are highlighted ...

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CODEC Configuration (First Page) CIG2 CIG1 CIG0 Configuration Register CFG0, CFG1 and CFG2. The bits ...

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LAW1 LAW0 Data Format 0 0 Two’s Complement 0 1 A-Law μ - Law Signed Magnitude CODEC Configuration (Second Page) ADPD CODEC ADC I2S0 0 Power Power Down 1 Configuration Register CFG0, CFG1 ...

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PIN DETAILS 7.8.1. Power and Ground Pins (Voltage Inputs) CCA CCD To minimize noise, the analog and digital circuits in the Winbond ISD5216 device use separate power busses. These +3 V busses lead to separate pins. ...

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RAC (ROW ADDRESS CLOCK) RAC is an open drain output pin that normally marks the end of a row. At the 8 kHz sample frequency the duration of this period is 256 ms. there are 1888 pages of memory in ...

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INT (Interrupt) INT is an open drain output pin. The Winbond ISD5216 Interrupt pin goes LOW and stays LOW when an Overflow (OVF) or End of Message (EOM) marker is detected. Each operation that ends in an EOM or OVF ...

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MIC- pins compared to the situation in which the external microphone is powered up through the power supply. It also saves current during power down. ACAP (AGC Capacitor) This pin provides the capacitor connection for setting the parameters of the ...

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AUTO MUTE AND AUTO GAIN FUNCTIONS During playback, the signal passes through the Automatic Attenuator before it is filtered. The Automatic Attenuator will attenuate all signals at the noise level in order to reduce the noise during quiet pauses. ...

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PROGRAMMING THE ISD 5216 7.10.1. Sending a byte on the I2C interface When reading or writing a byte of data on the I mechanisms for flow control are used, the first is the standard ACK that the slave or ...

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A graphical representation of this operation is found below. See the caption box above for more explanation. S SLAVE ADDRESS 7.10.4. Load Command Byte Register (Single Byte Load): A single byte may be written to the Command Byte Register in ...

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Digital Erase 2 1. Host executes I C START. 2. Send Slave Address with /W bit = “0” (Write). 3. Send Digital Erase command (d1h) 4. Send high address byte (00h) 5. Send low address byte (a0h) - erase ...

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Digital Write 1. Send I2C START. 2. Send Slave Address with /W bit = “0” (Write). 3. Send Digital Write command (c9h) 4. Send high address byte (00h) 5. Send low address byte (a0h) - erase row 5 in ...

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SDI SDI SDI Expander Expander (LAW1,LAW0) (LAW1,LAW0) (LAW1,LAW0 SCK SCK SCK μ/A-Law μ/A-Law SDIO SDIO SDIO Compressor Compressor (I2S0) (I2S0) (I2S0) (LAW1,LAW0) (LAW1,LAW0) (LAW1,LAW0) 1. Connect ...

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Power down the Volume Control Element— Bit VLPD controls the power up state of the Volume Control. This is bit D0 of CFG0 and it should be set to a ONE to power down this stage. 11. Power down ...

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Call Record The call record mode adds the ability to record the incoming phone call. In most applications, the ISD5216 would first be set up for Feed Through Mode as described above. When the user wishes to record the ...

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Memo Record The Memo Record mode sets the chip up to record from the local microphone into the chip’s Multilevel Storage Array. A connected cellular telephone or cordless phone chip set may remain powered down since they are not ...

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Memo and Call Playback This mode sets the chip up for local playback of recorded messages. The playback path is from the MULTILEVEL STORAGE ARRAY to the FILTER MUX, then to the LOW PASS FILTER stage. From there, the ...

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SAMPLE PC LAYOUT FOR PDIP The PDIP package is illustrated from the top. PC board traces and the three chip capacitors are on the bottom side of the board Note 3 ...

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TIMING DIAGRAMS START SDA SCL t f SDA PLAY AT ADDR SCL DATA CLOCK PULSES AUX IN AUX OUT TIMING DIAGRAM t SU;DAT t HIGH t LOW t SCLK PLAYBACK AND STOP CYCLE t START STOP ...

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Example of power up command ON THE I2C BUS - 53 - ISD5216 Publication Release Date: July 17, 2007 Revision B.5 ...

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I C INTERFACE TIMING PARAMETER SCL clock frequency Hold time (repeated) START condition. After this period, the first clock pulse is generated LOW period of the SCL clock HIGH period of the SCL clock Set-up time for a repeated ...

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I S TIMING DIAGRAMS Publication Release Date: July 17, 2007 - 55 - ISD5216 Revision B.5 ...

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CODEC Parameters The internal CODEC meets the specification of the ITU-T G.714 recommendation in 8 kHz sampling mode. This specification is verified, using the MIC+/- and SPEAKER+/- pins as analog input and output. The CODEC μ /A-Law Compander meets the ...

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Publication Release Date: July 17, 2007 - 57 - ISD5216 Revision B.5 ...

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ISD5216 ...

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PCM PARAMETERS PARAMETER SYMBOL Bit Clock Frequency Bit Clock Duty Cycle Word Sync. Frequency Word Sync. Frequency Rise Time Fall Time nd Hold Time for 2 cycle of Bit clock Transmit Sync. Timing Receive Sync. Timing Setup Time for SDI ...

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ABSOLUTE MAXIMUM RATINGS ABSOLUTE MAXIMUM RATINGS (Packaged Parts) Junction temperature Storage temperature range Voltage Applied to any pin Voltage applied to any pin (Input current limited to +/-20 mA) Lead temperature (soldering – 10 seconds ...

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ELECTRICAL CHARACTERISTICS Symbol Parameters V Input Low Voltage IL V Input High Voltage IH V SCL, SDA, SDIO Output Low OL Voltage V RAC, INT Output Low Voltage OL1 V Output High Voltage Current (Operating) CC ...

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TIMING PARAMETERS Symbol Parameters F Sampling Frequency S F Filter Knee CF 8.0 kHz (sample rate) 6.4 kHz (sample rate) 5.3 kHz (sample rate) 4.0 kHz (sample rate) T Record Duration REC 8.0 kHz (sample rate) 6.4 kHz (sample rate) ...

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Symbol Parameters T RAC Clock Period RAC 8.0 kHz (sample rate) 6.4 kHz (sample rate) 5.3 kHz (sample rate) 4.0 kHz (sample rate) T RAC Clock Low Time RACLO 8.0 kHz (sample rate) 6.4 kHz (sample rate) 5.3 kHz (sample ...

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ANALOG PARAMETERS Symbol Parameters V MIC +/- Input Voltage MIC+/- V MIC +/- input MIC (0TLP) transmission (0TLP) A MIC +/- Gain Tracking MIC (GT) R Microphone input resistance MIC A Microphone AGC Amplifier AGC Range V Microphone Bias Voltage ...

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Parameters Symbol V SP+/- Output Voltage (High SPHG Gain Setting) R SP+/- Output SPLG (Low Gain) R SP+/- Output SPHG (High Gain) C SP+/- Output Load Cap SP+/- Output Bias Voltage SPAG (Analog Ground) V Speaker Output DC ...

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Symbol Parameters A Output Gain OUT Absolute Gain Typical values 25°C and Vcc = 3.0V. [1] A All min/max limits are guaranteed by Winbond via electrical testing or characterization. Not [2] all specifications are 100 percent tested. Low-frequency ...

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TYPICAL APPLICATION CIRCUIT APPLICATIONS The ISD5216 is a single chip solution for voice and analog storage that also includes the capability to store digital information in the memory array. The array may be divided between analog and digital storage, ...

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Depending upon whether one desires recording one side (simplex) or both sides (duplex conversation, the various paths will also be switched through to the low pass filter (for antialiasing) and into the storage array. Later, the cell phone ...

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Electret Microphone WM-54B Panasonic .1μF 1.5kΩ .1μF HANDSET APPLICATION To Microcontroller interface and Address setting CCD 2 SCL MCLK SDA RAC 5 A0 SDIO 6 V SDI ...

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PACKAGE SPECIFICATIONG 12.1. PLASTIC THIN SMALL OUTLINE PACKAGE (TSOP) TYPE E DIMENSIONS ...

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PLASTIC SMALL OUTLINE INTEGRATED CIRCUIT (SOIC) DIMENSIONS Plastic Small Outline Integrated Circuit (SOIC) Dimensions INCHES Min 0.701 A ...

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PLASTIC DUAL INLINE PACKAGE (PDIP) DIMENSIONS Plastic Dual Inline Package (PDIP) (P) Dimensions INCHES Min Nom A 1.445 1.450 B1 0.150 B2 0.065 0.070 C1 0.600 C2 0.530 0.540 D D1 0.015 E 0.125 F 0.015 0.018 G 0.055 ...

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ORDERING INFORMATION Winbond Ordering Number Description Product Family ISD5216 Product (8- to 16-minute durations) Package Type: = 28-Lead 8x13.4mm Plastic Thin Small Outline Package (TSOP) Type 28-Lead 0.300-Inch Plastic Small Outline Package (SOIC 28-Lead ...

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VERSION HISTORY VERSION DATE A1 Nov. 2001 Initial issue B.1 Aug. 2002 Overall updates, not available in die form B.2 Jun. 2003 Update cover page Replace all I5216 by ISD5216 B.3 Apr. 2005 Revise disclaim section B.4 Jan. 2006 ...

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Winbond products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for surgical implantation, atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, or for other ...