ISD5216EY Nuvoton Technology Corporation of America, ISD5216EY Datasheet - Page 18

• Manufacturer Part Number: ISD5216EY
• Description: IC VOICE REC/PLAY 8-16MIN 28TSOP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: ISL5216r

Specifications of ISD5216EY

• Interface: I²C
• Filter Pass Band: 1.8 ~ 3.7kHz
• Duration: 8 ~ 16 Min
• Mounting Type: Surface Mount
• Package / Case: 28-TSOP
• For Use With: ISD-ES511 - EVALUATION SYSTEM FOR ISD5100ISD-ES501 - EVALUATION SYSTEM FOR ISD5008
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Master Reads from Slave immediately after first byte (Read Mode)
Another common operation in the ISD5216 is the reading of digital data from the chip’s memory array
at a specific address. This requires the I
Slave device, and then receive data from the Slave in a single I
data direction R/W bit must be changed in the middle of the command. The following example shows
the Master sending the Slave address, then sending a Command Byte and 2 bytes of address data to
the ISD5216, and then immediately changing the data direction and reading some number of bytes
from the chip’s digital array. An unlimited number of bytes can be read in this operation. The “N” not-
acknowledge cycle from the Master forces the end of the data transfer from the Slave. The following
example details the transfer explained in the section on page 22 of this datasheet.
Start Bit
Start Bit
Start Bit
Master
Master
Master
From
From
From
S
S
S
SLAVE ADDRESS
SLAVE ADDRESS
Master Reads from the Slave after setting data address in Slave
SLAVE ADDRESS
From Master
From Master
acknowledgement
acknowledgement
Master
From
R/W
Master
acknowledgement
From
W A
R/W
from slave
Master
from slave
R A
From
R/W
from slave
R
(Write data address, READ Data)
A
COMMAND BYTE
8 BITS of DATA
From Slave
STATUS W ORD
From Slave
acknowledgement
acknowledgement
from slave
from Master
2
acknowledgement
C interface Master to first send an address to the ISD5216
A
A
from Master
High ADDR. BYTE
A
- 18 -
8 BITS of DATA
From Slave
High ADDR. BYTE
From Slave
acknowledgement
acknowledgement
from Master
from slave
acknowledgement
A
A
from Master
2
C operation. To accomplish this, the
Low ADDR. BYTE
A
Low ADDR BYTE
8 BITS of DATA
From Slave
acknowledgement
From Slave
not-acknowledged
from slave
from Master
not-acknowled
from Master
A
ISD5216
N
N
Stop Bit
Master
Stop Bit
From
Master
From
P
P