CS4525-CNZ Cirrus Logic Inc, CS4525-CNZ Datasheet - Page 21

• Manufacturer Part Number: CS4525-CNZ
• Description: IC AMP AUDIO PWR 30W QUAD 48QFN
• Manufacturer: Cirrus Logic Inc
• Series: Popguard®r
• Type: Class Dr

Specifications of CS4525-CNZ

• Output Type: 2-Channel (Stereo) or 4-Channel (Quad)
• Package / Case: 48-QFN
• Max Output Power X Channels @ Load: 30W x 1 @ 4 Ohm; 15W x 2 @ 8 Ohm
• Voltage - Supply: 8 V ~ 18 V
• Features: ADC, Depop, I²C, I²S, Mute, PWM, Short-Circuit and Thermal Protection, Volume Control
• Mounting Type: Surface Mount
• Product: Class-D
• Output Power: 30 W
• Thd Plus Noise: 10 %
• Operating Supply Voltage: 2.5 V to 5 V
• Supply Current: 54 mA
• Maximum Power Dissipation: 180 mW
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Audio - Load Impedance: 4 Ohms, 6 Ohms, 8 Ohms
• Audio Load Resistance: 8 Ohms, 4 Ohms
• Minimum Operating Temperature: 0 C
• Supply Voltage (max): 5.25 V
• Supply Voltage (min): 2.375 V
• Amplifier Class: D
• No. Of Channels: 4
• Supply Voltage Range: 8V To 18V
• Load Impedance: 4ohm
• Operating Temperature Range: 0°C To +70°C
• Amplifier Case Style: QFN
• No. Of Pins: 48
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1586 - REFERENCE BOARD FOR CS4525 PWM
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1264

DS726PP2
SERIAL AUDIO INPUT PORT SWITCHING SPECIFICATIONS
AGND = DGND = PGND = 0 V; T
Notes:
Supported Input Sample Rates
LRCK Duty Cycle
SCLK Frequency
SCLK Duty Cycle
LRCK Setup Time Before SCLK Rising Edge
SDIN Setup Time Before SCLK Rising Edge
SDIN Hold Time After SCLK Rising Edge
RST pin Low Pulse Width
8. F
9.
10. After powering up the CS4525, RST should be held low until the power supplies and clocks are stable.
N
CLK
bits
is the number of bits per sample of the serial digital input.
is the frequency of the crystal connected to the XTI/XTO pins or the input SYS_CLK signal.
Parameters
LRCK
SCLK
SDIN
A
Figure 7. Serial Audio Input Port Timing
= 25°C; VD = 3.3 V; Inputs: Logic 0 = DGND; Logic 1 = VD.
t
s(LK-SK)
(Note 8),(Note 9)
t
s(SD-SK)
(Note 10)
MSB
t
r
//
//
//
//
//
Symbol
t
t
s(SD-SK)
s(LK-SK)
t
t
f
h
1/t
F
t
t
SI
h
P
p
//
F
SI
28.5
39.5
39.5
86.4
Min
*2*N
45
45
40
25
10
1
bits
MSB-1
Nominal
44.1
32
48
96
-
-
-
-
-
-
-
F
105.6
Max
35.2
52.8
52.8
CLK
55
55
-
-
-
-
/3
CS4525
Units
kHz
kHz
kHz
kHz
ms
Hz
ns
ns
ns
%
%
21