ADM1026 Analog Devices, ADM1026 Datasheet
ADM1026
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ADM1026 Summary of contents
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... MULTIPLEXER 8-BIT ADC BAND GAP REFERENCE AGND DGND V (1.82V OR 2.5V) REF Figure 1. Functional Block Diagram One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.326.8703 Management Controller ADM1026 3.3V STBY 3.3V MAIN SCL V CC RESET IN 3.3V MAIN RESETMAIN RESET V GENERATOR CC 100kΩ 3.3V STBY RESETSTBY ...
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... Changes to Software Reset Function Section ............................. 34 Changes to Ordering Guide .......................................................... 55 5/02—Revision 0: Initial Version Measurement Inputs .................................................................. 16 Temperature Measurement System.......................................... 20 Analog Output ............................................................................ 22 Fan Speed Measurement ........................................................... 25 Enabling and Clearing Interrupts ............................................ 29 NAND Tree Tests........................................................................ 31 Using the ADM1026 .................................................................. 33 Registers........................................................................................... 36 Detailed Register Descriptions ................................................. 38 Outline Dimensions ....................................................................... 54 Ordering Guide .......................................................................... 55 Rev Page ...
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... Rev Page ADM1026 Max Test Conditions/Comments 5.5 4.0 Interface inactive, ADC active ±3 ±3 0°C < T < 100°C D High level Low level ±2 ±1 12.06 36.18 120 115 12 120 100 CR2032 battery life >10 years ±5 ...
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... ADM1026 Parameter High Level Output Leakage Current Output Low Voltage PWM Output Frequency DIGITAL OUTPUTS (INT, RESETMAIN, RESETBY) Output Low Voltage RESET Pulse Width OPEN DRAIN SERIAL DATABUS OUTPUT (SDA) Output Low Voltage High Level Output Leakage Current, I ...
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... LQFP package 150°C • −65°C to +150°C θ 215°C 200°C 1000 V 2000 HIGH t t HD; DAT SU; DAT S Figure 2. Serial Bus Timing Diagram Rev Page 50°C/W, θ = 10°C HD; STA t t SU; STA SU; STO ADM1026 P ...
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... An active high input that captures a chassis intrusion event in Bit 6 of Status Register 4. This bit remains set until cleared, as long as battery voltage is applied to the V even when the ADM1026 is powered off. Interrupt Request (Open Drain). The output is enabled when Bit 1 of the configuration register is set to 1. The default state is disabled. It has an on-chip 100 kΩ ...
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... General-purpose I/O pin that can be configured as a digital input or output. 1 General-purpose I/O pin that can be configured as a digital input or output. 1 General-purpose I/O pin that can be configured as a digital input or output. 1 General-purpose I/O pin that can be configured as a digital input or output. 1 General-purpose I/O pin that can be configured as a digital input or output. Rev Page ADM1026 ...
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... PIII TEMPERATURE (°C) Figure 7. Pentium® III Temperature vs. ADM1026 Reading 5 0 –5 –10 –15 –20 – CAPACITANCE (nF) Figure 8. Temperature Error vs. Capacitance Between D+ and D– 100mV 20 ...
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... Rev Page ADM1026 100 110 120 TEMPERATURE (°C) Figure 13. Remote Sensor Temperature Error TIME (s) Figure 14. Response to Thermal Shock ...
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... second temperature sensing input. The eight remaining inputs are general-purpose analog inputs with a range 2 The ADM1026 also has an on-chip temperature sensor. The ADM1026 has eight pins that can be configured for fan speed measurement or as general-purpose logic I/O pins ...
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... Addresses 8000h to 9FFFh. This may be used for permanent storage of data that is not lost when the ADM1026 is powered down, unlike the data in the volatile registers. Although referred to as read-only memory, the EEPROM can be written to (as well as read from) via the serial bus in exactly the same way as the other registers ...
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... The facility to make hardwired changes to device addresses allows the user to avoid conflicts with other devices sharing the same serial bus, for example if more than one ADM1026 is used in a system. General SMBus Timing Figure 17 and Figure 18 show timing diagrams for general read and write operations using the SMBus ...
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... FRAME 3 DATA BYTE SMBus PROTOCOLS FOR RAM AND EEPROM The ADM1026 contains volatile registers (RAM) and non- volatile EEPROM. RAM occupies Addresses 00h to 6Fh, while EEPROM occupies Addresses 8000h to 9FFFh. Data can be written to and read from both RAM and EEPROM ...
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... The slave asserts ACK on the SDA. 6. The master asserts a stop condition on the SDA and the transaction ends. In the ADM1026, the send byte protocol is used to write a register address to RAM for a subsequent single-byte read from the same address or block read or write starting at that address. This is illustrated in Figure 19. ...
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... In this operation, the master device writes a block of data to a slave device. The start address for a block write must have been set previously. In the case of the ADM1026, this is done by a Send Byte operation to set a RAM address write byte/word operation to set an EEPROM address. ...
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... In this operation, the master device reads a block of data from a slave device. The start address for a block read must have been set previously. In the case of the ADM1026 this is done by a send byte operation to set a RAM address write byte/word operation to set an EEPROM address. The block read ...
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... Rev Page ADM1026 A-to-D Output A A Decimal IN (0–5) IN (6–9) < 0.012 < 0.010 0 0.012-0.023 0.010-0.019 1 0.023-0.035 ...
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... The −12 V input also has a resistor connected to the on-chip reference to offset the negative voltage range so that it is always positive and can be handled by the ADC. This allows most popular power supply voltages to be monitored directly by the ADM1026 without requiring any additional resistor scaling. 21.9kΩ A – ...
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... UL. Thus not necessary to add a series resistor between the battery and the V to the V Reference Output (V The ADM1026 offers an on-chip reference voltage (Pin 24) that can be used to provide a 1. 2.5 V reference voltage out- put. This output is buffered and specified to sink or source a load current of 2 mA. The reference voltage outputs 1. attenuator is not Bit 2 of Configuration Register 3 (Address 07h ...
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... Unfortunately, the absolute value of V calibration is required to null this out, so the technique is output is shown unsuitable for mass production. REF The technique used in the ADM1026 is to measure the change given by NDT3055 where K is Boltzmann’s constant the charge on the carrier, ...
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... For very long distances (up to 100 feet), use shielded twisted pair such as Belden #8451 microphone cable. Connect the twisted pair to D+ and D− and the shield to GND close to the ADM1026. Leave the remote end of the shield unconnected to avoid ground loops. Because the measurement technique uses switched current sources, excessive cable and/or filter capacitance can affect the measurement ...
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... ANALOG OUTPUT The ADM1026 has a single analog output from an unsigned 8-bit DAC that produces 2.5 V (independent of the refer- ence voltage setting). The input data for this DAC is contained in the DAC control register (Address 04h). The DAC control register defaults to FFh during a power-on reset, which pro- duces maximum fan speed ...
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... R3 39kΩ Q1/Q2 MBT3904 DUAL R4 DAC 10kΩ R2 100kΩ R3 39kΩ Q1/Q2 MBT3904 DUAL R4 10kΩ R1 4.7kΩ –12V +V 3. 12V FAN 10kΩ TYP Q1 PWM NDT3055L Figure 41. PWM Fan Drive Circuit Using an N-Channel MOSFET ADM1026 12V Q3 IRF9620 +12V Q3 IRF9620 ...
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... T from cycling on and off continuously when the temperature is close to T Whenever a fan starts or stops during automatic fan speed control, a one-off interrupt is generated at the INT output. This is described in more detail in the section on the ADM1026 Interrupt Structure. registers. If any 100% MIN ...
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... Signal conditioning in the ADM1026 accommodates the slow rise and fall times typical of fan tachometer outputs. The fan tach inputs have internal 10 kΩ pull-up resistors to 3.3 V STBY. In the event that these inputs are supplied from fan outputs that exceed the supply, either resistive attenuation of the fan signal or diode clamping must be included to keep inputs within an acceptable range ...
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... Note that fan speed measurement does not occur until 1.8 seconds after the monitor bit has been set. This is to allow the fans adequate time to spin up. Otherwise, the ADM1026 could generate false fan failure interrupts. During the 1.8 second fan spin-up time, all fan tach registers read 0x00. ...
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... The CI clear bit itself is cleared by BAT writing it. The CI input detects chassis intrusion events even when the ADM1026 is powered off (provided battery voltage is applied but does not immediately generate an interrupt. Once a BAT chassis intrusion event is detected and latched, an interrupt is generated when the system is powered on ...
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... ADM1026 ADM1026 Interrupt Structure The Interrupt Structure of the ADM1026 is shown in Figure 53. Interrupts can come from a number of sources, which are com- bined to form a common INT output. When INT is asserted, this output pulls low. The INT pin has an internal, 100 kΩ pull-up resistor. ...
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... Bit 2 of Configuration Register 1 is set. Bidirectional THERM Pin The ADM1026 has a second interrupt pin (GPIO16/ THERM Pin 42) that responds only to critical thermal events. The THERM pin goes low whenever a THERM limit is exceeded. This function is useful for CPU throttling or system shutdown. ...
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... ADM1026 FROM ANALOG/TEMP VALUE AND LIMIT REGISTERS HIGH LIMIT 1 = OUT OF LIMIT VALUE LOW LIMIT VALUE 1 = OUT FROM FAN SPEED OF LIMIT VALUE AND LIMIT REGISTERS HIGH LIMIT GPIO8 TO GPIO15 EXT1 TEMP 0 EXT 2 TEMP 1 3.3V STBY 2 3.3V MAIN 3 + CCP 5 +12V 6 –12V 7 MASK DATA FROM ...
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... Software Reset Function section for register details). Note that the 3.3 V STBY pin supplies power to the ADM1026. In applications that do not require monitoring of a 3.3 V STBY and 3.3 V MAIN supply, these two pins should be connected together (3 ...
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... ADM1026 Notes • For a NAND tree test to work, all outputs ( INT , RSTMAIN, RSTSTBY, and PWM) must remain high during the test. • When generating test waveforms, allow for a typical propagation delay of 500 ns through the NAND tree. • If any of the inputs shown in Figure 56 are unused, they should not be connected direct to ground, but via a resistor such as 10 kΩ ...
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... Table 12. In particular, note that all GPIO pins are configured as inputs to avoid possible conflicts with circuits trying to drive these pins. The ADM1026 can also be initialized at any time by writing Bit 7 of Configuration Register 1, which sets some registers to their default power-on conditions. This bit should be cleared by writing it. After power-on, the ADM1026 must be configured to the user’ ...
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... Reduced Power Mode The ADM1026 can be placed in a low power mode by setting Bit 0 of the configuration register to 0. This disables the internal ADC. Software Reset Function As previously mentioned, the ADM1026 can be reset in software by setting Bit 7 of Configuration Register 1 (Reg ...
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... A IN3 39 A 3.3V STBY IN2 40 A IN1 RESETMAIN 41 A IN0 RESETSTBY 42 THERM 43 GPIO15 44 GPIO14 GPIO13 45 GPIO12 46 47 GPIO11 48 GPIO10 Figure 62. ADM1026 Schematic Rev Page REF 23 DAC 22 3.3V_STBY AGND PWM 18 INT ADD 15 SDA 14 13 SCL ADM1026 ...
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... Status Register 2 22 Status Register 3 23 Status Register 4 R/W Description Write Address of ADM1026 registers. See the following tables for details. Power-On Value Description 00h Configures various operating parameters 00h Configures Pins 3–6 and 9–12 as fan inputs or GPIO 55h Sets oscillator frequency for Fan 0–3 speed measurement 55h Sets oscillator frequency for Fan 4– ...
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... High limit for A measurement IN4 FFh High limit for A measurement IN5 FFh High limit for A measurement IN6 FFh High limit for A measurement IN7 Rev Page BAT IN8 IN9 IN0 IN1 IN2 IN3 IN4 IN5 IN6 IN7 measurement IN9 measurement IN9 ADM1026 ...
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... Offset register for Remote Temperature Channel 2 Description When this bit is set the ADM1026 monitors all voltage, temperature and fan channels in a round robin manner. When this bit is set, the INT output pin is enabled. Setting this bit clears an interrupt from the voltage, temperature or fan speed channels. Because GPIO interrupts are level triggered, this bit has no effect on interrupts originating from GPIO channels ...
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... Rev Page ADM1026 Fan Speed (RPM) 8800, nominal, for count of 153 4400, nominal, for count of 153 2200, nominal, for count of 153 1100, nominal, for count of 153 Fan Speed (RPM) 8800, nominal, for count of 153 4400, nominal, for count of 153 ...
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... ADM1026 Table 18. Register 05h, PWM Control Register (Power-On Default FFh) Bit Name 7–4 PWM Control 3–0 Unused Table 19. Register 06h, EEPROM Register 1 (Power-On Default 00h) Bit Name 7–0 Factory Use Table 20. Register 07h, Configuration Register 3 (Power-On Default 00h) Bit Name 0 Enable GPIO16/ THERM = 0 ...
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... This register contains the T value for automatic fan speed control based on the internal MIN temperature channel. (Power-On Default 40h, 64°C) MIN Description This register contains the T value for automatic fan speed control based on the TDM1 MIN temperature channel. Rev Page ADM1026 ...
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... Test mode bits. For factory use only Clock Extend R/W Setting this bit enables SMBus clock extension. The ADM1026 can pull SCL low to extend the clock 7 pulse if it cannot accept any more data recommended to set this bit extend the clock pulse during repeated EEPROM write or block write operations. Table 33. Register 14h, Manufacturer’ ...
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... IN3 voltage channel are masked out. IN4 voltage channel are masked out. IN5 voltage channel are masked out. IN6 voltage channel are masked out. IN7 voltage channel are masked out. BAT voltage channel are masked out. IN8 Rev Page ADM1026 ...
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... ADM1026 Table 42. Register 1Dh, Mask Register 6 (Power-On Default 00h) Bit Name R/W 0 GPIO8 Mask = 0 R/W 1 GPIO9 Mask = 0 R/W 2 GPIO10 Mask = 0 R/W 3 GPIO11Mask = 0 R/W 4 GPIO12 Mask = 0 R/W 5 GPIO13 Mask = 0 R/W 6 GPIO14 Mask = 0 R/W 7 GPIO15 Mask = 0 R/W Table 43. Register 1Eh, INT Temp Offset (Power-On Default 00h) ...
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... GPIO configuration register.) When GPIO16 is configured as an output, setting this bit asserts GPIO16. (Asserted may be active high or active low depending on setting in GPIO configuration register.) Rev Page any channel. This bit is also set (once only) if the MIN ADM1026 ...
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... ADM1026 Table 49. Register 24h, Status Register 5 (Power-On Default 00h) Bit Name R GPIO0 Status = 0 R R/W 1 GPIO1 Status = 0 R R/W 2 GPIO2 Status = 0 R R/W 3 GPIO3 Status = 0 R R/W 4 GPIO4 Status = 0 R R/W 5 GPIO5 Status = 0 R R/W 6 GPIO6 Status = 0 R R/W 7 GPIO7 Status = 0 R R/W 1 GPIO status bits can be written only when a GPIO pin is configured as output. Read-only otherwise. ...
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... This register contains the measured value of the A Description This register contains the measured value of the Ext1 Temp channel. Description This register contains the measured value of the Ext2 Temp/A which bit is configured. Rev Page ADM1026 analog input channel. BAT analog input channel. IN8 channel depending on IN9 ...
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... ADM1026 Table 55. Register 2Ah, 3.3 V STBY Measured Value (Power-On Default 00h) Bit Name R/W 7–0 3.3 V STBY Value R Table 56. Register 2Bh, 3.3 V MAIN Measured Value (Power-On Default 00h) Bit Name R/W 7–0 3.3 V MAIN Value R Table 57. Register 2Ch Measured Value (Power-On Default 00h) Bit Name R/W 7–0 ...
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... This register contains the high limit of the 3.3 V MAIN analog input channel. Description This register contains the high limit of the +5 V analog input channel. Description This register contains the high limit of the V Rev Page ADM1026 channel depending on which one IN9 analog input channel. CCP ...
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... ADM1026 Table 83. Register 46h, +12 V High Limit (Power-On Default FFh) Bit Name R/W 7–0 +12 V High Limit R/W Table 84. Register 47h, −12 V High Limit (Power-On Default FFh) Bit Name R/W 7–0 −12V High Limit R/W Table 85. Register 48h, Ext1 Low Limit (Power-On Default 80h) Bit ...
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... IN6 analog input channel. IN7 analog input channel. IN0 analog input channel. IN1 analog input channel. IN2 analog input channel. IN3 analog input channel. IN4 analog input channel. IN5 analog input channel. IN6 analog input channel. IN7 ADM1026 ...
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... ADM1026 Table 111. Register 62h, FAN2 High Limit (Power-On Default FFh) Bit Name R/W 7–0 FAN2 High Limit R/W Table 112. Register 63h, FAN3 High Limit (Power-On Default FFh) Bit Name R/W 7–0 FAN3 High Limit R/W Table 113. Register 64h, FAN4 High Limit (Power-On Default FFh) ...
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... From a software point of view, this may be a very simple method to vary the characteristics of the measurement channel if the thermal characteristics change for any reason (for instance from one chassis to another), if the measurement point is moved plug-in card is inserted or removed, and so on. Rev Page ADM1026 ...
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... ADM1026 OUTLINE DIMENSIONS 1.45 1.40 1.35 0.15 SEATING 0.05 PLANE ROTATED 90 ° CCW 0.75 1.60 0.60 MAX 0.45 SEATING PLANE 10° 6° 0.20 2° 0.09 VIEW A 7° 3.5 ° 0° 0.08 MAX COPLANARITY VIEW A COMPLIANT TO JEDEC STANDARDS MS-026BBC Figure 63. 48-Lead Thin Plastic Quad Flat Package [LQFP 1.4 mm Thick (ST-48) Dimensions shown in millimeters Rev ...
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... ORDERING GUIDE Model ADM1026JST ADM1026JST-REEL ADM1026JST-REEL7 1 ADM1026JSTZ-REEL EVAL-ADM1026EB Pb-free part. Temperature Range Package Description 0°C to 100°C 48-Lead LQFP 0°C to 100°C 48-Lead LQFP 0°C to 100°C 48-Lead LQFP 0°C to 100°C 48-Lead LQFP Evaluation Board Rev Page ADM1026 ...
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... ADM1026 NOTES © 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C02657-0-3/04(A) Rev Page ...