AD802-155BR Analog Devices, AD802-155BR Datasheet
AD802-155BR
Related parts for AD802-155BR
AD802-155BR Summary of contents
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... Jitter bandwidth is dictated by mask programmable fractional loop bandwidth. The AD800, used for data rates < 90 Mbps, has been designed with a nominal loop bandwidth of 0.1% of the center frequency. The AD802, used for data rates in excess of 90 Mbps, has a loop bandwidth of 0.08% of center frequency. ...
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... –2– GND Loop Damping MAX CC A MIN MAX AD800-52BR AD802-155KR/BR Min Typ Max Min Typ Max 51.84 155. –40 85 – 155 156 49 53 155 156 ...
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... Differential Frequency Acquisition Indicator Output 20 FRAC Differential Frequency Acquisition Indicator Output Device Center Frequency AD800-45BQ 44.736 MHz AD800-52BR 51.84 MHz AD802-155BR 155.52 MHz AD802-155KR 155.52 MHz REV +300 mV EE SOIC Package Cerdip Package Use of a heatsink may be required depending on operating environment. GLOSSARY ...
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... Bit Error Rate vs. Signal-to-Noise Ratio The AD800 and AD802 were designed to operate with standard ECL signal levels at the data input. Although not recom- mended, smaller input signals are tolerable. Figure 8, 14, and ...
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... Figure 4. AD800-45 Jitter vs. Temperature 100 100 1E-1 5E-2 3E-2 2E-2 1E-2 1E-3 1E-4 1E-5 1E-7 1E-9 1E-11 0.20 0.25 0.30 Figure 8. AD800-45 Bit Error Rate vs. Input Jitter –5– – AD800/AD802 – TEMPERATURE – C AD800-45 DS-3 MASK JITTER FREQUENCY – Hz Figure 6. AD800-45 Jitter Tolerance ...
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... AD800/AD802 –40 – TEMPERATURE – C Figure 9. AD800-52 Center Frequency vs. Temperature –40 – TEMPERATURE – C Figure 11. AD800-52 Capture and Tracking Range vs. Temperature 0. 0.05 0.10 0.15 INPUT JITTER – UI p-p Figure 13 ...
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... Figure 16. AD802-155 Output Jitter vs. Temperature 100 100 1E-1 5E-2 3E-2 2E-2 1E-2 1E-3 1E-4 1E-5 1E-6 1E-8 1E-10 1E-12 100 1000 Figure 20. AD802-155 Bit Error Rate vs. Input Jitter to V MAX –7– AD800/AD802 – TEMPERATURE – C AD802-155 CCITT G.958 STM1 TYPE A MASK JITTER FREQUENCY – Hz Figure 18 ...
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... This figure is chosen so that sinusoidal input jitter at 130 kHz will be attenuated by 3 dB. The jitter bandwidths of the AD800-45 and AD800-52 are 0.1% of the respective center frequencies. The jitter bandwidth of the AD800 or the AD802 is mask programmable from 0.01 the center frequency. A device with a very low loop bandwidth (0.01% of the center frequency) could effectively filter (clean up) a jittery timing reference ...
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... ECL Line Receiver 3.0 TO DEVICE 0.1 F 2.5 TO DEVICE 0.1 F 2.0 BEAD WITH TWO LOOPS 1.5 TO DEVICE 0.1 F 1.0 BEAD WITH TWO LOOPS 0.5 TO DEVICE 0 Figure 24. AD802-155 Output Jitter vs. Supply Noise (PECL Configuration) –9– AD800/AD802 5.0V C17 0.1 FRAC FRAC R23 R22 130 10H116 R24 80 ...
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... Description Resistor, 100 , 1% Resistor, 154 , 1% Resistor, 80 Resistor, 130 , 1% Resistor, 274 , 1% Capacitor, Loop Damping (See Specifications Page) Capacitor Tantalum Capacitor, 0.1 F, Ceramic Chip AD800/AD802 10H116, ECL Line Receiver –10– AD802-155 PINS 8, 13, PINS 10, 15, 18 PIN 3 –5.2V —5. ...
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... Figure 27. Negative Supply Configuration: Component Side (Top Layer) Figure 28. Negative Supply Configuration: Solder Side REV. B Figure 29. Positive Supply Configuration: Component Side (Top Layer) Figure 30. Positive Supply Configuration: Solder Side –11– AD800/AD802 ...
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... AD800/AD802 0.200 (5.08) MAX 0.200 (5.08) 0.125 (3.18) OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 20-Pin Small Outline IC Package (R-20) 0.512 (13.00) 0.496 (12.60 0.300 (7.60) 0.292 (7.40 0.50 (1.27) 0.019 (0.48) BSC 0.014 (0.36) 0.011 (0.28) 0.004 (0.10) 0.015 (0.38) 0.050 (1.27) 0.007 (0.18) 0.016 (0.40) 20-Pin Cerdip Package (Q-20) 0.005 (0.13) MIN 0.098 (2.49) MAX 20 11 0.310 (7.87) PIN 1 0.220 (5.59) ...