ATmega1284PR231 Atmel Corporation, ATmega1284PR231 Datasheet - Page 328
ATmega1284PR231
Manufacturer Part Number
ATmega1284PR231
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT86RF231.pdf
(198 pages)
2.ATMEGA1284PR231.pdf
(380 pages)
3.ATMEGA1284PR231.pdf
(20 pages)
Specifications of ATmega1284PR231
Flash (kbytes)
128 Kbytes
Max. Operating Frequency
20 MHz
Max I/o Pins
32
Spi
3
Twi (i2c)
1
Uart
2
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
AES
Sram (kbytes)
16
Eeprom (bytes)
4096
Operating Voltage (vcc)
1.8 to 3.6
Timers
3
Frequency Band
2.4 GHz
Max Data Rate (mb/s)
2
Antenna Diversity
Yes
External Pa Control
Yes
Power Output (dbm)
3
Receiver Sensitivity (dbm)
-101
Receive Current Consumption (ma)
13.2
Transmit Current Consumption (ma)
14.4
Link Budget (dbm)
104
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26.6
8059D–AVR–11/09
SPI Timing Characteristics
See
Table 26-6.
Note:
Figure 26-3. SPI Interface Timing Requirements (Master Mode)
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
Figure 26-3 on page 328
(Data Output)
(Data Input)
(CPOL = 0)
(CPOL = 1)
1. In SPI Programming mode the minimum SCK high/low period is:
- 2 t
- 3 t
MISO
MOSI
SS high to tri-state
SCK
SCK
SCK to out high
SCK to SS high
SCK high/low
SS low to SCK
SS
Rise/Fall time
Rise/Fall time
SCK high/low
SS low to out
SPI Timing Parameters
Description
CLCL
CLCL
SCK period
SCK period
Out to SCK
SCK to out
SCK to out
Setup
Setup
Hold
Hold
for f
for f
CK
CK
< 12 MHz
> 12 MHz
6
4
(1)
MSB
5
MSB
and
Figure 26-4 on page 329
Master
Master
Master
Master
Master
Master
Master
Master
Mode
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
7
...
4 • t
2 • t
...
Min
10
t
20
20
ck
ck
ck
for details.
See
50% duty cycle
2
0.5 • t
Table 16-5
TBD
TBD
Typ
10
10
15
10
10
15
10
LSB
ATmega1284P
1
sck
LSB
2
3
Max
8
ns
328
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