ATmega168 Atmel Corporation, ATmega168 Datasheet - Page 43

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ATmega168

Manufacturer Part Number
ATmega168
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega168

Flash (kbytes)
16 Kbytes
Pin Count
32
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
23
Ext Interrupts
24
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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10.9
10.9.1
2545T–AVR–05/11
Register description
SMCR – Sleep mode control register
The sleep mode control register contains control bits for power management.
• Bits 7..4 Res: Reserved bits
These bits are unused bits in the Atmel ATmega48/88/168, and will always read as zero.
• Bits 3..1 – SM2..0: Sleep mode select bits 2, 1, and 0
These bits select between the five available sleep modes as shown in
Table 10-2.
Note:
• Bit 0 – SE: Sleep enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP
instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s
purpose, it is recommended to write the sleep enable (SE) bit to one just before the execution of
the SLEEP instruction and to clear it immediately after waking up.
Bit
0x33 (0x53)
Read/write
Initial value
SM2
0
0
0
0
1
1
1
1
1. Standby mode is only recommended for use with external crystals or resonators.
Sleep mode select.
R
7
0
SM1
0
0
1
1
0
0
1
1
R
6
0
R
5
0
SM0
0
1
0
1
0
1
0
1
R
4
0
Sleep mode
Idle
ADC noise reduction
Power-down
Power-save
Reserved
Reserved
Standby
Reserved
SM2
R/W
3
0
(1)
SM1
R/W
ATmega48/88/168
2
0
SM0
R/W
Table
1
0
10-2.
R/W
SE
0
0
SMCR
43

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