ATmega406 Atmel Corporation, ATmega406 Datasheet - Page 189

• Manufacturer Part Number: ATmega406
• Manufacturer: Atmel Corporation

Specifications of ATmega406

• Flash (kbytes): 40 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 1 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 18
• Ext Interrupts: 4
• Usb Speed: No
• Usb Interface: No
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -30 to 85
• I/o Supply Class: 4.0 to 25
• Operating Voltage (vcc): 4.0 to 25
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Pwm Channels: 2
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

27.7.10
2548E–AVR–07/06
Reading the Signature Row from Software
To read the Signature Row from software, load the Z-pointer with the signature byte address
given in
is executed within three CPU cycles after the SIGRD and SPMEN bits are set in SPMCSR, the
signature byte value will be loaded in the destination register. The SIGRD and SPMEN bits will
auto-clear upon completion of reading the Signature Row Lock bits or if no LPM instruction is
executed within three CPU cycles. When SIGRD and SPMEN are cleared, LPM will work as
described in the ”AVR Instruction Set” description.
Table 27-5.
Signature Byte
Device ID 0, Manufacture ID
Device ID 1, Flash Size
Device ID 2, Device
FOSCCAL
Reserved
Slow RC FRQ
Slow RC L
Slow RC H
Slow RC Temp Prediction L
Slow RC Temp Prediction H
ULP RC FRQ
ULP RC L
ULP RC H
Bandgap PTAT Current Calibration Byte
V-ADC RAW Cell 1 L
V-ADC RAW Cell 1 H
V-ADC Cell1 Gain Calibration Word L
V-ADC Cell1 Gain Calibration Word H
V-ADC Cell2 Gain Calibration Word L
V-ADC Cell2 Gain Calibration Word H
V-ADC Cell3 Gain Calibration Word L
V-ADC Cell3 Gain Calibration Word H
V-ADC Cell4 Gain Calibration Word L
V-ADC Cell4 Gain Calibration Word H
V-ADC ADC0 Gain Calibration Word L
V-ADC ADC0 Gain Calibration Word H
V-ADC Cell1 Offset
Table 27-5
(1)
(6)
(3)
(5)
(2)
Signature Row Addressing
(12)
and set the SIGRD and SPMEN bits in SPMCSR. When an LPM instruction
(8)
(7)
(9)
(9)
(9)
(9)
(10)
(4)
Z-Pointer Address
0x00
0x02
0x04
0x01
0x03
0x05
0x06
0x07
0x0C
0x0D
0x08
0x0A
0x0B
0x09
0x0E
0x0F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
0x1C
ATmega406
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