ATmega406 Atmel Corporation, ATmega406 Datasheet - Page 33

• Manufacturer Part Number: ATmega406
• Manufacturer: Atmel Corporation

Specifications of ATmega406

• Flash (kbytes): 40 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 1 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 18
• Ext Interrupts: 4
• Usb Speed: No
• Usb Interface: No
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -30 to 85
• I/o Supply Class: 4.0 to 25
• Operating Voltage (vcc): 4.0 to 25
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Pwm Channels: 2
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8.4
8.5
2548E–AVR–07/06
Power-down Mode
Power-off Mode
When the SM2:0 bits are written to 010, the SLEEP instruction makes the MCU enter Power-
down mode. In this mode, the Fast RC Oscillator (RCOSC_FAST), 32 kHz Crystal Oscillator
(XOSC_32K), and Slow RC Oscillator (RCOSC_SLOW) are stopped, while the the Ultra Low
Power RC Oscillator (RCOSC_ULP), External Interrupts, the Battery Protection and the Watch-
dog continue to operate (if enabled).
Note that if a level triggered interrupt is used for wake-up from Power-down mode, the changed
level must be held for some time to wake up the MCU. For more details, see
on page
When waking up from Power-down mode, a delay from the wake-up condition occurs until the
wake-up becomes effective. This allows the clock to restart and become stable after having
been stopped. The wake-up period is defined in
When the SM2:0 bits are written to 100, the SLEEP instruction makes the CPU ask the voltage
regulator to shut off power to the CPU, leaving only the Regulator and the Charger Detect Cir-
cuitry to be operational. To ensure that the MCU enters Power-off mode only when intended, the
SLEEP instruction must be executed within 4 clock cycles after the SM2..0 bits are written.
Note that before entering Power-off sleep mode, interrupts should be disabled by software. Oth-
erwise interrupts may prevent the SLEEP instruction from being executed within the time limit.
Table 8-2.
Module
RCOSC_FAST
RCOSC_ULP
XOSC_32K/
RCOSC_SLOW
CPU
Flash
8-bit Timer/16-bit Timer
SMBus
V-ADC
CC-ADC
External Interrupts
CBP
VBP
WDT
(2)
56.
Active modules in different Sleep Modes
Active
X
X
X
X
X
X
X
X
X
X
X
X
X
Idle
X
X
X
X
X
X
X
X
X
X
X
”Clock Sources” on page
NRM
ADC
X
X
X
X
X
X
X
X
X
X
(1)
Mode
Power-
save
X
X
X
X
X
X
X
X
(1)
ATmega406
26.
Power-
”External Interrupts”
down
X
X
X
X
X
X
(1)
Power-
off
33