ATmega8535 Atmel Corporation, ATmega8535 Datasheet - Page 207

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ATmega8535

Manufacturer Part Number
ATmega8535
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega8535

Flash (kbytes)
8 Kbytes
Pin Count
44
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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Operation
2502K–AVR–10/06
Figure 98. Analog-to-Digital Converter Block Schematic
The ADC converts an analog input voltage to a 10-bit digital value through successive
approximation. The minimum value represents GND and the maximum value represents
the voltage on the AREF pin minus 1 LSB. Optionally, AVCC or an internal 2.56V refer-
ence voltage may be connected to the AREF pin by writing to the REFSn bits in the
ADMUX Register. The internal voltage reference may thus be decoupled by an external
capacitor at the AREF pin to improve noise immunity.
The analog input channel and differential gain are selected by writing to the MUX bits in
ADMUX. Any of the ADC input pins, as well as GND and a fixed bandgap voltage refer-
ence, can be selected as single ended inputs to the ADC. A selection of ADC input pins
can be selected as positive and negative inputs to the differential gain amplifier.
If differential channels are selected, the differential gain stage amplifies the voltage dif-
ference between the selected input channel pair by the selected gain factor. This
amplified value then becomes the analog input to the ADC. If single ended channels are
used, the gain amplifier is bypassed altogether.
AREF
ADC7
ADC6
ADC5
ADC4
ADC3
ADC2
ADC1
ADC0
AVCC
GND
INTERNAL 2.56V
REFERENCE
REFERENCE
8-BIT DATA BUS
BANDGAP
INPUT
INPUT
POS.
MUX
NEG.
MUX
ADC MULTIPLEXER
SELECT (ADMUX)
MUX DECODER
+
-
SINGLE ENDED / DIFFERENTIAL SELECTION
GAIN
AMPLIFIER
10-BIT DAC
ADC CTRL. & STATUS
REGISTER (ADCSRA)
ADC CONVERSION
COMPLETE IRQ
PRESCALER
CONVERSION LOGIC
ATmega8535(L)
ADTS[2:0]
INTERRUPT
TRIGGER
SELECT
FLAGS
SAMPLE & HOLD
COMPARATOR
15
+
-
ADC DATA REGISTER
(ADCH/ADCL)
ADC MULTIPLEXER
OUTPUT
0
207

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