ATmega8535 Atmel Corporation, ATmega8535 Datasheet - Page 78

• Manufacturer Part Number: ATmega8535
• Manufacturer: Atmel Corporation

Specifications of ATmega8535

• Flash (kbytes): 8 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 32
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

78
ATmega8535(L)
Figure 32. Fast PWM Mode, Timing Diagram
The Timer/Counter Overflow Flag (TOV0) is set each time the counter reaches MAX. If
the interrupt is enabled, the interrupt handler routine can be used for updating the com-
pare value.
In fast PWM mode, the compare unit allows generation of PWM waveforms on the OC0
pin. Setting the COM01:0 bits to two will produce a non-inverted PWM and an inverted
PWM output can be generated by setting the COM01:0 to three (See Table 41 on page
84). The actual OC0 value will only be visible on the port pin if the data direction for the
port pin is set as output. The PWM waveform is generated by setting (or clearing) the
OC0 Register at the Compare Match between OCR0 and TCNT0, and clearing (or set-
ting) the OC0 Register at the timer clock cycle the counter is cleared (changes from
MAX to BOTTOM).
The PWM frequency for the output can be calculated by the following equation:
The “N” variable represents the prescale factor (1, 8, 64, 256, or 1024).
The extreme values for the OCR0 Register represents special cases when generating a
PWM waveform output in the fast PWM mode. If the OCR0 is set equal to BOTTOM, the
output will be a narrow spike for each MAX+1 timer clock cycle. Setting the OCR0 equal
to MAX will result in a constantly high or low output (depending on the polarity of the out-
put set by the COM01:0 bits).
A frequency (with 50% duty cycle) waveform output in fast PWM mode can be achieved
by setting OC0 to toggle its logical level on each Compare Match (COM01:0 = 1). The
waveform generated will have a maximum frequency of f
set to zero. This feature is similar to the OC0 toggle in CTC mode, except the double
buffer feature of the output compare unit is enabled in the fast PWM mode.
TCNTn
Period
OCn
OCn
1
2
3
f
OCnPWM
4
=
----------------- -
N 256
f
clk_I/O
⋅
5
OC0
6
= f
clk_I/O
OCRn Interrupt Flag Set
OCRn Update and
TOVn Interrupt Flag Set
7
/2 when OCR0 is
(COMn1:0 = 2)
(COMn1:0 = 3)
2502K–AVR–10/06