ATmega8535 Atmel Corporation, ATmega8535 Datasheet - Page 85

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ATmega8535

Manufacturer Part Number
ATmega8535
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega8535

Flash (kbytes)
8 Kbytes
Pin Count
44
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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Timer/Counter Register –
TCNT0
Output Compare Register –
OCR0
Timer/Counter Interrupt Mask
Register – TIMSK
2502K–AVR–10/06
• Bit 2:0 – CS02:0: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter.
Table 43. Clock Select Bit Description
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will
clock the counter even if the pin is configured as an output. This feature allows software
control of the counting.
The Timer/Counter Register gives direct access, both for read and write operations, to
the Timer/Counter unit 8-bit counter. Writing to the TCNT0 Register blocks (removes)
the Compare Match on the following timer clock. Modifying the counter (TCNT0) while
the counter is running, introduces a risk of missing a Compare Match between TCNT0
and the OCR0 Register.
The Output Compare Register contains an 8-bit value that is continuously compared
with the counter value (TCNT0). A match can be used to generate an output compare
interrupt, or to generate a waveform output on the OC0 pin.
• Bit 1 – OCIE0: Timer/Counter0 Output Compare Match Interrupt Enable
When the OCIE0 bit is written to one, and the I-bit in the Status Register is set (one), the
Timer/Counter0 Compare Match interrupt is enabled. The corresponding interrupt is
executed if a Compare Match in Timer/Counter0 occurs (i.e., when the OCF0 bit is set in
the Timer/Counter Interrupt Flag Register – TIFR).
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
CS02
0
0
0
0
1
1
1
1
CS01
0
0
1
1
0
0
1
1
OCIE2
R/W
R/W
R/W
7
0
7
0
7
0
CS00
0
1
0
1
0
1
0
1
TOIE2
R/W
R/W
R/W
6
0
6
0
6
0
Description
No clock source (Timer/counter stopped).
clk
clk
clk
clk
clk
External clock source on T0 pin. Clock on falling edge.
External clock source on T0 pin. Clock on rising edge.
TICIE1
I/O
I/O
I/O
I/O
I/O
R/W
R/W
R/W
5
0
5
0
5
0
/(No prescaling)
/8 (From prescaler)
/64 (From prescaler)
/256 (From prescaler)
/1024 (From prescaler)
OCIE1A
R/W
R/W
R/W
4
0
4
0
4
0
TCNT0[7:0]
OCR0[7:0]
OCIE1B
R/W
R/W
R/W
3
0
3
0
3
0
TOIE1
R/W
R/W
R/W
2
0
2
0
ATmega8535(L)
2
0
OCIE0
R/W
R/W
R/W
1
0
1
0
1
0
TOIE0
R/W
R/W
R/W
0
0
0
0
0
0
TCNT0
OCR0
TIMSK
85

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