ATmega8535 Atmel Corporation, ATmega8535 Datasheet - Page 225

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ATmega8535

Manufacturer Part Number
ATmega8535
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega8535

Flash (kbytes)
8 Kbytes
Pin Count
44
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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RWW – Read-While-Write
Section
NRWW – No Read-While-Write
Section
2502K–AVR–10/06
Note that the user software can never read any code that is located inside the RWW
section during a Boot Loader software operation. The syntax “Read-While-Write Sec-
tion” refers to which section that is being programmed (erased or written), not which
section that actually is being read during a Boot Loader software update.
If a Boot Loader software update is programming a page inside the RWW section, it is
possible to read code from the Flash, but only code that is located in the NRWW sec-
tion. During an on-going programming, the software must ensure that the RWW section
never is being read. If the user software is trying to read code that is located inside the
RWW section (i.e., by a rcall/rjmp/lpm or an interrupt) during programming, the software
might end up in an unknown state. To avoid this, the interrupts should either be disabled
or moved to the Boot Loader section. The Boot Loader section is always located in the
NRWW section. The RWW Section Busy bit (RWWSB) in the Store Program Memory
Control Register (SPMCR) will be read as logical one as long as the RWW section is
blocked for reading. After a programming is completed, the RWWSB must be cleared by
software before reading code located in the RWW section. See “Store Program Memory
Control Register – SPMCR” on page 228. for details on how to clear RWWSB.
The code located in the NRWW section can be read when the Boot Loader software is
updating a page in the RWW section. When the Boot Loader code updates the NRWW
section, the CPU is halted during the entire page erase or page write operation.
Table 88. Read-While-Write Features
Figure 112. Read-While-Write vs. No Read-While-Write
pointer Address During the
Which Section does the Z-
Programming?
Z-pointer
Addresses RWW
Section
Code Located in
NRWW Section
can be Read During
the Operation
NRWW section
RWW section
Read-While-Write
No Read-While-Write
Which Section can be
(RWW) Section
(NRWW) Section
Programming?
NRWW section
Read During
None
ATmega8535(L)
Halted?
Is the
CPU
Yes
No
Z-pointer
Addresses NRWW
Section
CPU is Halted
During the Operation
Read-While-
Supported?
Write
Yes
No
225

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