ATxmega192A3U Atmel Corporation, ATxmega192A3U Datasheet - Page 236

• Manufacturer Part Number: ATxmega192A3U
• Manufacturer: Atmel Corporation

Specifications of ATxmega192A3U

• Flash (kbytes): 192 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 10
• Twi (i2c): 2
• Uart: 7
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 16
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

20.3.4
8331A–AVR–07/11
IN
If the endpoint is isochronous and there was a bit-stuff or CRC error in the incoming data, the
number of received data bytes, excluding CRC, is written to endpoint CNT. Finally, CRC and
BUSNACK0 in endpoint, STATUS and CRCIF in INTFLAGSASET/CLR are set.
If data was successfully received, an ACK handshake is returned to the host if the endpoint is
not isochronous, and the number of received data bytes, excluding CRC, is written to CNT. If the
number of received data bytes is the maximum data payload specified by SIZE no CRC data are
written in the data buffer. If the number of received data bytes is the maximum data payload
specified by SIZE minus one, only the first CRC data bytes is written in the data buffer If the
number of received data bytes is equal or less than the data payload specified by SIZE minus
two, the two CRC data bytes are written in the data buffer.
Finally, the Transaction Complete Flag (TRNCOMPL0) and BUSNACK0 are set and TOGGLE is
toggled if the endpoint is not isochronous. The Transaction Complete Interrupt Flag (TRNIF) in
INTFLAGSBCLR/SET is set. The endpoint's configuration table address is written to the FIFO if
the transaction Complete FIFO mode is enabled.
When an OUT token is detected and the device address of the token packet does not match that
of the endpoint, the packet is discarded and the USB module returns to idle and waits for the
next token packet.
If an IN token is detected the, the USB module fetches endpoint CTRL and STATUS from the
addressed input endpoint in the endpoint configuration table. If the endpoint is disabled, the USB
module returns to idle and waits for the next token packet.
If STALL in endpoint CTRL is set, and the endpoint is not isochronous, a STALL handshake is
returned to the host, the STALL flag in endpoint STATUS and the STALL Interrupt Flag (STAL-
LIF) in INTFLAGSACLR/SET are set.
If BUSNACK0 is set, OVF in endpoint STATUS and OVFIF in INTFLAGSACLR/SET are set. If
the endpoint is not isochronous, a NAK handshake is returned to the host.
The data in the data buffer pointed to by endpoint DATAPTR is sent to the host in a DATA0
packet if the endpoint is isochronous, otherwise a DATA0 or DATA1 packet according to TOG-
GLE is sent. When the number of data bytes specified in endpoint CNT is sent, the CRC is
appended and sent to the host.
For isochronous endpoints, BUSNACK0 and TRNCOMPL0 in the endpoint STATUS are set.
TRNIF is set, and the endpoint's configuration table address is written to the FIFO if the transca-
tion complete FIFO mode is enabled.
For all non isochronous endpoints, the USB module waits for an ACK handshake from the host.
If an ACK handshake is not received within 16 USB clock cycles, the USB module returns to idle
and waits for the next token packet. If an ACK handshake was successfully received
BUSNACK0 and TRNCOMPL0 are set, and TOGGLE is toggled. TRNIF is set and the end-
point's configuration table address is written to the FIFO if the transcation complete FIFO mode
is enabled.
When an IN token is detected and the device address of the token packet does not match that of
the endpoint, the packet is discarded and the USB module returns to idle and waits for the next
token packet.
Atmel AVR XMEGA AU
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