ATxmega192A3U Atmel Corporation, ATxmega192A3U Datasheet - Page 238

• Manufacturer Part Number: ATxmega192A3U
• Manufacturer: Atmel Corporation

Specifications of ATxmega192A3U

• Flash (kbytes): 192 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 10
• Twi (i2c): 2
• Uart: 7
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 16
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

20.5
8331A–AVR–07/11
Clock Generation
Figure 20-6. SRAM Memory Mapping
The USB module requires minimum 6MHz clock for low speed USB operation, and minimum
48MHz clock for full speed USB operation. It can be clocked from internal or external clock
sources by using the internal PLL, or directly from 32 MHz internal oscillator when this is tuned
and calibrated to 48 MHz. The CPU and Peripherals clocks must run at minimum 1.5 MHz for
low speed operation, and minimum 12MHz for full speed operation.
The USB module clock selection is independent and separate from the main System Clock
selection. Selection and setup is done using the main Clock control settings. For details, refer to
”System Clock and Clock Options” on page
The
(MAXEP+1)*16
Figure 20-7 on page 239
ADDRESS
SRAM
EPPTR +
EPPTR
FIFO
ENDPOINT
DESCRIPTORS
TABLE
FRAME
NUMBER
(MAXEP+1)<<4
shows an overview of the USB module clock selection.
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
EP_ADDRH_MAX
81.
EP_ADDRH_0
FRAMENUMH
EP_ADDRL_0
FRAMENUML
DATAPTRH
AUXDATAL
AUXDATAH
DATAPTRH
AUXDATAL
AUXDATAH
DATAPTRH
AUXDATAL
AUXDATAH
DATAPTRL
DATAPTRL
DATAPTRL
STATUS
STATUS
STATUS
CNTH
CNTH
CNTH
CTRL
CNTL
CTRL
CNTL
CTRL
CNTL
Atmel AVR XMEGA AU
ENDPOINT
ENDPOINT
ENDPOINT
MAXEP IN
0 OUT
0 IN
(MAXEP+1) x 4 Bytes
Active when FIFOEN==1
(MAXEP+1) x 16 Bytes
2 Bytes
Active when
STFRNUM==1
238