ATxmega256A3BU Atmel Corporation, ATxmega256A3BU Datasheet - Page 30

• Manufacturer Part Number: ATxmega256A3BU
• Manufacturer: Atmel Corporation

Specifications of ATxmega256A3BU

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 47
• Ext Interrupts: 49
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 8
• Twi (i2c): 2
• Uart: 6
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

4.16
4.16.1
4.16.2
4.16.3
8331A–AVR–07/11
Register Descriptions – Fuses and Lockits
FUSEBYTE0 – Nonolatile Memory Fuse Byte 0
FUSEBYTE1 – Nonolatile Memory Fuse Byte1
FUSEBYTE2 – Nonolatile Memory Fuse Byte2
• Bit 7 – JTAGUID[7:0]: JTAG USER ID
These fuses can be used to set the default JTAG user ID for the device. During reset, the
JTAGUID fuse bits will be loaded into the MCU JTAG user ID register.
• Bit 7:4 – WDWPER[3:0]: Watchdog Window Timeout Period
These fuse bits are used to set initial value of the closed window for the Watchdog Timer in Win-
dow Mode. During reset these fuse bits are automatically written to the WPER bits Watchdog
Window Mode Control Register, refer to
129
• Bit 3:0 – WDPER[3:0]: Watchdog Timeout Period
These fuse bits are used to set the initial value of the watchdog timeout period. During reset
these fuse bits are automatically written to the PER bits in the watchdog control register. Refer to
”CTRL – Watchdog Timer Control Register” on page 128
• Bit 7 – Reserved
This fuse bit is reserved. For compatibility with future devices, always write this bit to one when
this register is written.
Bit
+0x02
Read/Write
Initial Value
Bit
+0x00
Read/Write
Initial Value
Bit
+0x01
Read/Write
Initial Value
for details.
R/W
R/W
R/W
7
–
1
7
0
7
0
BOOTRST
R/W
R/W
WDWPER[3:0]
6
0
6
0
R/W
6
1
R/W
R/W
5
0
5
0
TOSCSEL
R/W
5
1
”WINCTRL – Window Mode Control Register” on page
R/W
R/W
4
0
4
0
JTAGUID[7:0]
R/W
4
–
1
R/W
R/W
3
0
3
0
Atmel AVR XMEGA AU
R/W
3
–
1
for details.
R/W
R/W
2
0
2
0
WDPER[3:0]
R/W
2
–
1
R/W
R/W
1
0
1
0
R/W
1
1
BODPD[1:0]
R/W
R/W
0
0
0
0
R/W
0
1
FUSEBYTE0
FUSEBYTE1
FUSEBYTE2
30