ATxmega256A3BU Atmel Corporation, ATxmega256A3BU Datasheet - Page 99
ATxmega256A3BU
Manufacturer Part Number
ATxmega256A3BU
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega256A3BU
Flash (kbytes)
256 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
47
Ext Interrupts
49
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
8
Twi (i2c)
2
Uart
6
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
16
Eeprom (bytes)
4096
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
7
Output Compare Channels
22
Input Capture Channels
22
Pwm Channels
22
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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7.11
7.11.1
7.11.2
8331A–AVR–07/11
Register Description
CTRL – DFLL Control Register
CALA – DFLL Calibration Register A
tion, the actual clock source that is selected must enabled and configured for the calibration to
function.
Table 7-10.
• Bit 0 – RC2MCREF: 2MHz Oscillator Calibration Reference
This bit is used to select the calibration source for the 2MHz DFLL. By default, this bit is zero and
the 32.768kHz internal oscillator is selected. If this bit is set to one, the 32.768kHz crystal oscil-
lator on TOSC is selected as the reference. This bit will select only which calibration source to
use for the DFLL. In addition, the actual clock source that is selected must enabled and config-
ured for the calibration to function.
• Bit 7:1 – Reserved
These bits are reserved and will always be read as zero. For compatibility with future devices,
always write these bits to zero when this register is written.
• Bit 0 – ENABLE: DFLL Enable
Setting this bit enables the DFLL and auto-calibration of the internal oscillator
The CALA and CALB registers hold the 13-bit DFLL calibration value that is used for automatic
run-time calibration of the internal oscillator. When the DFLL is disabled, the calibration registers
can be written by software for manual run-time calibration of the oscillator. The oscillators will
also be calibrated according to the calibration value in these registers when the DFLL is
disabled.
Bit
+0x02
Read/Write
Initial Value
Bit
+0x00
Read/Write
Initial Value
RC32MCREF[1:0]
–
DFLL32M/DFLL2M
00
01
10
11
R/W
R
7
–
0
7
–
0
32MHz oscillator reference selection.
R/W
R
6
6
–
0
x
Group Configuration
R/W
5
–
R
0
5
x
USBSOF
XOSC32
RC32K
—
R/W
R
4
x
4
–
0
CALA[6:0]
R/W
R
3
Atmel AVR XMEGA AU
Description
32.768kHz internal oscillator
32.768kHz crystal oscillator on TOSC
USB start of frame
Reserved
3
–
0
x
R/W
R
2
–
0
2
x
R/W
R
1
–
0
1
x
ENABLE
R/W
R/W
0
0
0
x
CTRL
CALA
99
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