ATxmega64A3 Atmel Corporation, ATxmega64A3 Datasheet - Page 343

• Manufacturer Part Number: ATxmega64A3
• Manufacturer: Atmel Corporation

Specifications of ATxmega64A3

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Speed: No
• Usb Interface: No
• Spi: 10
• Twi (i2c): 2
• Uart: 7
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

28.6.2
8077H–AVR–12/09
Scanning the PDI pins.
Figure 28-4. Bidirectional boundary scan cell
Two observe-only cells are inserted to make the combined RESET and PDI_CLK pin, and the
PDI_DATA pin observable. Even though the PDI_DATA pin is bi-directional, it is only made
observable in order to avoid any extra logic on the PDI_DATA output path.
Figure 28-5. An observe-only input cell
Output Control
Output Data (IN)
Input Data (IN)
From system
(DIR)
pin
Mode
1
0
0
1
From last cell
Shift DR
1
0
1
0
0
1
Clock DR
D
D Q
To next cell
Q
Update DR
D Q
D Q
D
To next cell
Q
En
To system
logic
Pn
XMEGA A
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