M42800A Atmel Corporation, M42800A Datasheet - Page 156

no-image

M42800A

Manufacturer Part Number
M42800A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of M42800A

Flash (kbytes)
0 Kbytes
Pin Count
144
Max. Operating Frequency
33 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
54
Usb Speed
No
Usb Interface
No
Spi
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
External Bus Interface
1
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3/5.0
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Instruction Cycle Timings
6.8
6-14
Store register
Cycle
1
2
The first cycle of a store register instruction is similar to the first cycle of load register
instruction. During the second cycle the base modification is performed, and at the same
time the data is written to memory. There is no third cycle.
The cycle timings are listed in Table 6-11 where:
Address
pc+2L
alu
pc+3L
c represents the current processor mode:
d=0 if the T bit has been specified in the instruction (such as LDRT) and d=c at
all other times.
s represents the size of the data transfer shown by MAS[1:0] (see Table 6-10 on
page 6-13).
Copyright © 1994-2001. All rights reserved.
c=0 for User mode
c=1 for all other modes
MAS[1:0]
i
s
nRW
0
1
Table 6-11 Store register instruction cycle operations
Data
(pc+2L)
Rd
nMREQ
0
0
SEQ
0
0
nOPC
0
1
ARM DDI 0029G
nTRANS
c
d

Related parts for M42800A