M42800A Atmel Corporation, M42800A Datasheet - Page 26

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M42800A

Manufacturer Part Number
M42800A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of M42800A

Flash (kbytes)
0 Kbytes
Pin Count
144
Max. Operating Frequency
33 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
54
Usb Speed
No
Usb Interface
No
Spi
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
External Bus Interface
1
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3/5.0
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Introduction
1.1.3
1.1.4
1-4
Memory interface
EmbeddedICE Logic
The ARM7TDMI processor memory interface has been designed to allow performance
potential to be realized, while minimizing the use of memory. Speed-critical control
signals are pipelined to allow system control functions to be implemented in standard
low-power logic. These control signals facilitate the exploitation of the fast-burst access
modes supported by many on-chip and off-chip memory technologies.
The ARM7TDMI core has four basic types of memory cycle:
EmbeddedICE Logic is the additional hardware provided by debuggable ARM
processors to aid debugging. It allows software tools to debug code running on a target
processor. The EmbeddedICE Logic is controlled through the Joint Test Action Group
(JTAG) test access port, using the EmbeddedICE interface. See Chapter 5 Debug
Interface and Appendix B Debug in Depth for more information.
idle cycle
nonsequential cycle
sequential cycle
coprocessor register transfer cycle.
Copyright © 1994-2001. All rights reserved.
ARM DDI 0029G

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